Adrian Prantl
TU Vienna
![[Picture yet to come]](./ich.jpg)
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Adrian Prantl
Center for Applied Scientific Computing (CASC)
P.O. Box 808, L-422
Fax: +1 (925) 423-4990 |
After completing my PhD studies at Vienna University of Technology, I am now a post-doctoral researcher at the Center for Applied Scientific Computing (CASC) at Lawrence Livermore National Laboratory. My current research focus is on compilers, tools and compiler-like tools for high-performance language interoperability. My CV can be downloaded here.
Although I no longer working at the institute, I can still be reached under the e-mail address shown above.
My thesis High-level compiler support for timing analysis is now available for download.
Braid extends the Babel concept to modern parallel (PGAS) programming languages such as Chapel or X10. Aparat from supporting these languages, we also aim at reducing the cost of interoperability with a more flexible term-based intermediate representation in the Braid code generator that paves the way for future optimizations.
My current main project: https://computation.llnl.gov/casc/components/
This project is concerned with worst-case execution time (WCET) analysis of embedded systems, focusing in particular on developing techniques for compilers to support WCET analysis. As one result of this project, the TuBound high-level WCET analysis tool was designed and implemented.
You can find a lot more information about the project at the CoSTA project homepage.
Similar in spirit to CoSTA, ALL-TIMES is a research project within the European Commission's 7th Framework Programme on Research, Technological Development and Demonstration. It aims at bringing together the technologies developed by European research groups and industrial partners.
As of April 2009, I am employed for the ALL-TIMES project.
As a part of my work on CoSTA, I am also an avid user and contributer to this project. I'm especially interested in the external term representation, and maintainer of the term manipulation library Termite.
My master's thesis Creating a GCC backend for VLIW Architectures was published in 2006. It describes how to port GCC 4.0 to a custom 4-way parallel VLIW architecture.
My research interests are probably best described to include everything influencing the way we program computers and consequently the search for better methods to create more reliable software, without restricting possibilities and expressiveness for the programmer. This includes the exploration of alternative programming languages, especially functional and logic-oriented ones, but also the design of annotation languages. For me, the foundation to achieving this is compiler technology. Currently, I am mostly concerned with static program analysis applied to the field of worst-case execution time analysis.
The DBLP entry usually lags a couple of months behind, but at least I don't have to maintain it myself :-)