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\title{\bf PP \emph{Compilation Techniques for Robust Embedded Systems}}

\author{{\sc Jens Knoop and Andreas Krall}\\
\{knoop,andi\}@complang.tuwien.ac.at
}

\bibliographystyle{unsrt}

\begin{document}
\maketitle

PP leader: \emph{Jens Knoop and Andreas Krall (beide E185.1)}

Associated researchers: \emph{Anton Ertl (E185.1), Bernhard Gramlich (E185.2)}



\subsubsection*{Motivation:} 
%\emph{Informal description of the purpose of the PP (3-5 lines)}
Every embedded system consists of software which is written in a high
level language, compiled to machine language and executed on a
processor. For robust embedded systems new verified analysis and
compilation, simulation, and specification methods are necessary to
support the programmer during application development and maintenance
and to optimize for performance, power, space, concurrency and
reliability during compilation.
%for short, new programming and
%compilation techniques for robust embedded systems development and
%deployment.

\subsubsection*{State of the art and related work:} 
%\emph{Briefly describe the scientific state of the art (20-30 lines)}

%Compilation Techniques for Reliability
Because of the exponential increase of the number of transistors and
the continuing decrease of the feature sizes of current processors
\emph{soft errors} mainly caused by energetic particles are becoming an
important design issue for robust embedded systems. Blome et
al.~\cite{Blome+06} observed that a majority of faults that affect the
architectural state of a processor come from the register file. Lee
and Shrivastava \cite{LeeShrivastava09a,LeeShrivastava09c} proposed
different solutions to cope with this problem. The first assigns
variables depending on their lifetime to either the ECC protected or
the unprotected part of a register file to balance energy consumption
and reliability \cite{LeeShrivastava09a}.  The second spills registers
to ECC protected memory if the register contents are not used for a
long period \cite{LeeShrivastava09c}.  There exist complete software
solutions which use different forms of code duplications
\cite{Oh+02a,Reis+05}, which do failure virtualization
\cite{WapplerMueller08} or which use techniques like control flow
checking \cite{Oh+02b}. A complete overview of processor description
languages and generation of compilers and simulators from processor
specifications gives the book of Mishra and Dutt \cite{MishraDutt08}.
A good survey of current instruction set simulators gives our chapter
in the \emph{Handbook of Signal Processing systems} \cite{BrHoKr09}. A
famous instruction set simulator with modelling of energy consumption
is \emph{Wattch} \cite{BrooksTiwariMartonosi00}.

Methods for \emph{compiler verification} do exist
\cite{Langmaack97a,Po-lncs124,MMO-lncs1283,Goos:99:verifix,Goos:00:ASM,1328444}. 
Most notably are the pioneering approaches of the
\emph{ProCoS} \cite{Langmaack96a} and the \emph{Verifix}
\cite{Goerigk-et-al:CC96,GlesnerGoosZimmeermann04,GoosZimmermann00} projects, and more recently of 
the \emph{CompCert} project \cite{CompCert,BDL-fm06,Le-popl06}. There
is also a rich body of work on the related approaches of
\emph{translation validation}
\cite{Pnueli98a,Pnueli98b,Ne-pldi00,ZaksPnueli08}, 
\emph{certifying compilation} 
\cite{NL-pldi98,Colby-etal-pldi00,BlechPoetzsch07}, and
\emph{proof-carrying code} \cite{Ne-popl97,AF-popl00,FNSG-tlfi07}. 
However, an integratedly verified compiler, which is optimizing and
ensures non-functional program properties such as on time and space
resources required by the compiled program is still
missing. Complementary to these approaches are approaches focusing on
frameworks for verifying compiler optimizations
\cite{781156,1040335,Kundu+09} or the verification of specific
compiler optimizations, such as the \emph{Lazy Code Motion}
\cite{TristanLeroy09} or instruction scheduling
\cite{TristanLeroy08}. By far more ambitious and a grand challenge for
computing research is Tony Hoare's vision of a \emph{verifying
compiler} which proves properties of the translated program
\cite{Hoare03}.

\emph{Resource analysis}, especially worst-case execution time analysis $($WCET$)$ for real-time systems, which are often safety-critical, is a vibrant field of research in academia and industry and of fast growing economical relevance,
especially in the avionics and automotive industry. A survey on
state-of-the-art tools and methods for WCET analysis has recently been
given by Wilhelm et al.~\cite{Wilhelm:TECS2008}. The outcomes of the
WCET Tool Challenges \cite{Gus:ISoLA2006,Holsti:WCET2008}, however,
demonstrate that all these tools have their own strengths and
limitations. In particular, they all rely to some extent on
user-assistance and thus a \emph{trusted information basis} guiding
the WCET analysis \cite{Prantl:WCET2009}.


%\paragraph{AK}
%Three aspects of program and compiler correctness exist. The verifying
%compiler proves properties of the translated program and is a grand challenge
%for computing research \cite{Hoare03}. A certified compiler like Verifix is
%proven once to do semantically equivalent optimizations and translations
%\cite{GlesnerGoosZimmeermann04,GoosZimmermann00}. Translation validation proves
%at every compiler run that the translation is correct and was introduced by
%Pnueli et al.\ \cite{Pnueli98a,Pnueli98b} and Necula \cite{Necula00}. Until now
%some optimizations have been verified, recently lazy code motion
%\cite{TristanLeroy09}, instruction scheduling \cite{TristanLeroy08}, or the whole
%code generation phase \cite{BlechPoetzsch07}. Another research direction is the
%construction of general frameworks for validation \cite{ZaksPnueli08} or
%generalizations like parameterized equivalence checking \cite{Kundu+09}.
 



\subsubsection*{Previous achievements:} 
%\emph{Brief description of your own contributions to the related
%scientific state-of-the art (5-10 lines)}
Jens Knoop's research focuses on proven correct and optimal program
analyses and optimizations \cite{Kn-lncs1428}. He is the co-inventor
of the \emph{Lazy Code Motion}
\cite{KRS-pldi92,KRS-retrolcm04,XueK06}, and numerous other program
analyses and optimizations including
\emph{partial dead-code elimination}  \cite{KRS-pldi94} and 
\emph{partially redundant assignment elimination} \cite{KRS-pldi94}, 
which are now part of state-of-the-art compilers. Regarding the
present PP, particularly important are the achievements on
resource-aware program analyes and optimizations including the
code-size sensitive \emph{Sparse Code Motion} \cite{RKS-popl00}, and its 
counterpart for \emph{Speculative Code Motion} \cite{scholz04}.
Recent research in the frame of the FWF project CoSTA and the EU FP7
project ALL-TIMES focuses on compiler support for
\emph{worst-case execution time analysis} for safety-critical
real-time embedded systems
\cite{Prantl:WCET2009,SchrSchoKn09,Prantl:WLPE2008,prantl_et_al:DSP:2008:1661,kirner_et_al:DSP:2008:1657,kirner_et_al:DSP:2007:1197}.

% He served on $50+$ 
%programme committees of international conferences including PLDI, CC,
%TACAS, Formal Methods, and Supercomputing. He was the General Chair of
%PLDI'02 and ETAPS'06, and is Programme Committee Co-Chair of PACT'10. He is the
%iniator and co-founder of the annual workshop series on
%\emph{Compiler Optimization meets Compiler Verification} (since 2002),
%co-organizer of 4 Dagstuhl seminars, most recently on \emph{Verifying
%Optimizing Compilation}, and a member of the European Network of
%Excellence HiPEAC.
%, and the IFIP WG 2.4 \emph{Software Implementation Technology}.

Andreas Krall does research in the area of architecture description
languages and the automatic generation of highly optimizing compilers,
efficient instruction set simulators and hardware from one single
specification of a processor \cite{BrFeKrRi09,BrEbKr07,FaKrHo07,
FarKrStBrand06,Krall+04micro}. An important focus is on optimization
techniques for embedded processors
\cite{EbBrSchKrWiKa08,MeKr07,PrKrHo06,HiKr03} as he leads the Christian
Doppler research laboratory {\em compilation techniques for embedded
processors} with partners from industry (Infineon, OnDemand
Microelectronics).

The PP is designed to exploit the synergies of the complementary
expertise of Jens Knoop on resource-aware program analyses and
optimizations and their verification and of Andreas Krall on
compilation techniques for embedded processors. Their complementary
expertise is essential for the PP.


\subsubsection*{Goals (first 4 years):}
%\emph{Description of the research 
%topics to be addressed during the first 4 years. Make sure to explicitly 
%stress what the significant additions to the scientific knowledge are, 
%and why they are important. (30-40 lines)}
The goals of the first 4 years are as follows:

\begin{itemize}
\item New modeling and representation techniques of non-functional 
      program and system properties on the programming and
      intermediate language levels
\item Definitions and measures of non-functional program and system
      properties (performance, time, space/memory, power,
      concurrency).
\item Modeling and representation of these properties alongside 
      with the programming languages semantics 
\item Adapting and enhancing state-of-the-art compilation techniques 
      towards non-functional property and platform awareness
\item New functional and non-functional property and platform-aware 
      compilation techniques
\item Analyses for non-functional program and system properties 
\item Functional and non-functional property and platform-aware 
      code generation techniques
\item Enabling validation and verification throughout the compilation
      process 
\item Techniques for reducing or eliminating trusted code,
      annotation, etc., bases
\end{itemize}
These goals are essential for making the development and the
compilation of embedded systems software more reliable and
robust. Moreover, they are the basis for the second 4 years extension
of the project.


\subsubsection*{Work Plan (first 4 years):}
%\emph{Brief description of how 
%you intend to conduct the actual research during the first 4 years. Be sure 
%to also describe and (coarsely) quantify the resources (staff, cost of 
%special equipment) required for this work in a table. (20-30 lines)}
Compilation techniques for robust embedded systems comprise different
areas.  Therefore, the project is divided into three work packages:
\emph{compilation and simulation techniques for reliability}, \emph{verified
compilation} and \emph{resource analysis}.

\paragraph*{WP1 - Compilation and Simulation Techniques for Reliability}

In previous work we have developed a processor description language
with a very concise semantics from where we automatically generate
optimized compilers \cite{BrEbKr07} and high efficient instruction set
simulators \cite{BrFeKrRi09}. This environment we use as testbed for
our compiler optimizations for embedded processors
\cite{EbBrSchKrWiKa08,PrKrHo06,MeKr07}. We will extend this
environment to do research on compilation and simulation techniques to
enhance the reliability of processor/memory systems by mixed
hardware/software and pure software techniques. 

\begin{itemize}
\item Specification method to specify an energy consumption model in
      a processor specification.
\item Specification method for redundancy and error correction in the
      processor specification
\item Specification method for fault injection and fault checking in
      the processor specification
\item Generation of optimized instruction set simulators from the
      extended processor specification
\item Generation of optimizing compilers from the extended processor
      specification
\item Research into new compiler optimizations to increase reliability by
      pure software solutions, mixed hardware/software solutions and
      balancing performance, code space, reliability and energy consumption
\item Research of correctness proofs and validation of the new optimizations

\end{itemize}

\paragraph*{WP2 - Verified Compilation}

Suitable semantics are necessary which support efficient translation
validation or support easy verification of a compiler. We will
research into different semantics and into mappings between the
semantics of our processor description language \cite{BrEbKr07} and a
compiler backend semantics, intermediate representation semantics
(compatible to LLVM) and source language semantics. The main research
will be on verification and translation validation for all kinds of
compiler optimizations.

\begin{itemize}
\item Evaluate different semantics regarding suitability for compiler
      verification and translation validation, eventually develop new
      semantics
\item Develop a translator for an automatic mapping from our processor
      description language into verification semantics
\item Develop a validation system from the intermediate representation
      (LLVM) to the processor semantics
\item Develop a validation system from the source language (C) to the
      intermediate representation (LLVM)
\item Research into verification and translation validation for different
      frontend and backend optimizations
\end{itemize}

\paragraph*{WP3 - Resource Analysis}
For safety-critical real-time embedded sytems resource consumption
measured in terms of a quantitative aspect of a program execution such
as execution time, storage use, and power consumption belongs rather
to the functional properties of an application rather its
non-functional ones. Formal guarantees on resource consumption are
thus essential and mandatory to ensure the robustness of such
systems. This requires new and usually more complex but more
expressive program analyses and transformations to support the (1)
programmer during source code development by early and automatically
providing hints on resource consumption and (2) the compiler to
optimize for resource consumption. In our previous work we focused on
compiler support for
\emph{worst-case execution time analysis $($WCET$)$} \cite{Prantl:WCET2009,Prantl:WLPE2008,prantl_et_al:DSP:2008:1661,kirner_et_al:DSP:2008:1657}. Based on this work we will extend this research towards 
other quantitive aspects of resource consumption, especially storage
usage, towards these two global objectives, using the programming
environment used there as testbed for implementation
\cite{Prantl:WCET2009,Prantl:WLPE2008,prantl_et_al:DSP:2008:1661,kirner_et_al:DSP:2008:1657}.

\begin{itemize}
\item Research into new program analyses for providing high-quality
      bounds on resourse consumption which are useful for both the
      application programmer and the compiler.
\item Research new program analyses and static optimizations 
      to optimize for resource consumption and to help complying to
      possibly given limits.
\item Research suitable abstraction levels of interfaces and modes
      of interaction between fully automatic program analysis and
      verification methods and semi-automatic ones relying on
      user-assistance because of undecidability issues
\item Research the synergies and the trade-off between fully 
      automatic program analysis and verification methods and
      semi-automatic ones utilizing user-assistance on high-quality
      resource bounds and the computational costs to compute them.
\item Research simulation and profiling methods to assess the 
      quality of resource consumption analyses and to support 
      correctness and security checks at run-time. 
\end{itemize}
Overall, this WP will contribute to the design, foundations,
verification, implementation, and application of resource analyses.




\begin{tabular}{llll}
\\
\hline
{\bf Pos} & {\bf Type} & {\bf Description}    & {\bf Duration} \\
NN1 & PhD & reliable compilation / simulation & 4 years \\
NN2 & PhD & verified compilation              & 4 years \\
NN3 & PhD & resource analysis                 & 4 years \\
\hline
\end{tabular}


\subsubsection*{Goals (last 4 years):}
%\emph{Brief description of the 
%research topics to be addressed during the last 4 years. Make sure to 
%explicitly stress what the significant additions to the scientific 
%knowledge are, and why they are important. (20-30 lines)}

In the last 4 years we will extend the research of the first years into
some additional directions like

\begin{itemize}
\item New programming languages and compilers for RESs
\item Non-functional properties and requirements as first-class language and
      compiler citizens
\item New compilation techniques enabling a uniform and integrated approach
      for ensuring functional and non-functional program and system requirements
\item Verified compilers, proof-carrying code, verifying compilation for RESs
\item Making legacy applications fit to and available on RESs
\item Techniques for adjusting and decompiling legacy applications
\end{itemize}

Application of the results of this research reduces the cost of the
development of reliable and correct embedded systems and makes them
safer and robust.

\subsubsection*{Collaboration with other PPs:}
%\emph{List the PPs you are expecting to collaborate with, and describe briefly
%the topic and  nature of such a collaboration. (10-20 lines)}

\begin{itemize}
\item PP Composition of Non-functional Requirements [I.S.T.A./Henzinger]:
      Links to specification and modeling of timing properties, to execution
      models, hardware and software models.
\item PP Composition and Predictability in RES Architectures
      [E182.1/Puschner]: Links to hard- and software models for time
      predictable systems, verification of timing behaviour.
\item PP Formal Verification for Robustness [E184/Veith]: Links to software
      model-checking and testing of code (on source code and intermediate
      code levels), support for program analysis and transformation.
\item PP Modeling \& Analysis of Robust Distributed Systems [E182.2/Schmid]:
      Links to functional and non-functional system requirements,
      distribution, concurrency.
\end{itemize}

\subsubsection*{External Collaborations:}
%\emph{List envisioned international  and national collaborations, and
%describe briefly the topic and nature  of such a collaboration. (5-10
%lines)}
\begin{itemize}
\item Walter Binder, University of Lugano, Switzerland (resource analysis)
\item Sabine Glesner, TU Berlin, Berlin, Germany (verified compilation)
\item Aviral Shrivastava, Arizona State University, Tempe, AZ, USA (reliable compilation)
\item Wolf Zimmermann, Martin-Luther Universit\"at Halle-Wittenberg, Halle, Germany
      (verified compilation)
\end{itemize}

\begin{comment}
%Bitte hier die Bibtex-Entries  einfuellen, z.B.,


------------------------------------

@article{Hoare,
 author = {Tony Hoare},
 title = {The verifying compiler: A grand challenge for computing research},
 journal = {Journal of the ACM},
 volume = {50},
 number = {1},
 year = {2003},
 issn = {0004-5411},
 pages = {63--69},
 doi = {http://doi.acm.org/10.1145/602382.602403},
 publisher = {ACM},
 address = {New York, NY, USA},
 }
 
 @article{1328444,
 author = {Jean-Baptiste Tristan and Xavier Leroy},
 title = {Formal verification of translation validators: a case study on instruction scheduling optimizations},
 journal = {SIGPLAN Not.},
 volume = {43},
 number = {1},
 year = {2008},
 issn = {0362-1340},
 pages = {17--27},
 doi = {http://doi.acm.org/10.1145/1328897.1328444},
 publisher = {ACM},
 address = {New York, NY, USA},
 }
 
 @article{1314860,
 author = {Jan Olaf Blech and Arnd Poetzsch-Heffter},
 title = {A Certifying Code Generation Phase},
 journal = {Electron. Notes Theor. Comput. Sci.},
 volume = {190},
 number = {4},
 year = {2007},
 issn = {1571-0661},
 pages = {65--82},
 doi = {http://dx.doi.org/10.1016/j.entcs.2007.09.008},
 publisher = {Elsevier Science Publishers B. V.},
 address = {Amsterdam, The Netherlands, The Netherlands},
 }
 
@INPROCEEDINGS{LeeShrivastava09,
        TITLE       = {A Compiler Optimization to Reduce Soft Errors in Register Files},
        AUTHOR      = {Jongeun Lee and Aviral Shrivastava},
        BOOKTITLE   = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems},
        EDITOR      = {Mahmut Kandemir},
        PUBLISHER   = {ACM},
        PAGES       = {??--??},
        ADDRESS     = {Dublin},
        MONTH       = {June},
        YEAR        = {2009},
}

@BOOK{MishraDutt08,
        TITLE       = {Processor Description Languages},
        AUTHOR      = {Prabhat Mishra and Nikil Dutt (Editor)},
        PUBLISHER   = {Morgan Kaufmann},
        YEAR        = {2008},
}



%Eigene Referenzen ab hier.

@InProceedings{SchrSchoKn09,
        TITLE       = "Adding Timing-Awareness to {AUTOSAR} Basic-Software - A Component Based Approach",
        AUTHOR      = "Dietmar Schreiner and Markus Schordan and Jens Knoop",
        BOOKTITLE   = "12th IEEE International Symposium on Object/component/service-oriented
                       Real-time distributed Computing (ISORC 2009)",
        PUBLISHER   = "IEEE",
        ADDRESS     = "Tokyo, Japan",
        YEAR        = "2009",
        MONTH       = "March",
        PAGES       = "288--292",
}

@inproceedings{Prantl:WLPE2008,
	Address = {Udine, Italy},
	Author = {Adrian Prantl and Jens Knoop and Markus Schordan and Markus Triska},
	Booktitle = {The 18th Workshop on Logic-based methods in Programming Environments (WLPE 2008)},
	Month = {December 12},
	Title = {Constraint solving for high-level WCET analysis},
	Year = {2008},
        URL = {http://costa.tuwien.ac.at/papers/wlpe08.pdf}
}

@InProceedings{prantl_et_al:DSP:2008:1661,
  author =	"Adrian Prantl and Markus Schordan and Jens Knoop",
  title =	"TuBound - {A} Conceptually New Tool for Worst-Case
		 Execution Time Analysis",
  booktitle =	"8th Intl. Workshop on Worst-Case Execution Time (WCET)
		 Analysis",
  year = 	"2008",
  editor =	"Raimund Kirner",
  publisher =	"Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik,
		 Germany",
  address =	"Dagstuhl, Germany",
  URL =  	"http://drops.dagstuhl.de/opus/volltexte/2008/1661",
  annote =	"Keywords: Worst-case execution time (WCET) analysis,
		 Tool Chain, Flow Constraints, Source-To-Source",
  ISBN = 	"978-3-939897-10-1",
  note = 	"also published in print by Austrian Computer Society
		 (OCG) under ISBN 978-3-85403-237-3",
}

@InProceedings{kirner_et_al:DSP:2008:1657,
  author =	"Raimund Kirner and Albrecht Kadlec and Adrian Prantl
		 and Markus Schordan and Jens Knoop",
  title =	"Towards a Common {WCET} Annotation Language: Essential
		 Ingredients",
  booktitle =	"8th Intl. Workshop on Worst-Case Execution Time (WCET)
		 Analysis",
  year = 	"2008",
  editor =	"Raimund Kirner",
  publisher =	"Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik,
		 Germany",
  address =	"Dagstuhl, Germany",
  URL =  	"http://drops.dagstuhl.de/opus/volltexte/2008/1657",
  annote =	"Keywords: Worst-case execution time (WCET) analysis,
		 annotation languages, WCET annotation language
		 challenge",
  ISBN = 	"978-3-939897-10-1",
  note = 	"also published in print by Austrian Computer Society
		 (OCG) under ISBN 978-3-85403-237-3",
}

@InProceedings{kirner_et_al:DSP:2007:1197,
  author =	"Raimund Kirner and Jens Knoop and Adrian Prantl and
		 Markus Schordan and Ingomar Wenzel",
  title =	"{WCET} Analysis: The Annotation Language Challenge",
  booktitle =	"7th Intl. Workshop on Worst-Case Execution Time (WCET)
		 Analysis",
  year = 	"2007",
  editor =	"Christine Rochange",
  publisher =	"Internationales Begegnungs- und Forschungszentrum
		 f{"u}r Informatik (IBFI), Schloss Dagstuhl, Germany",
  address =	"Dagstuhl, Germany",
  URL =  	"http://drops.dagstuhl.de/opus/volltexte/2007/1197",
  annote =	"Keywords: Worst-case execution time analysis, WCET,
		 path description, annotation language challenge,
		 expressiveness, convenience",
}


@InProceedings{knoop:DSP:2008:1575,
  author =	{Jens Knoop},
  title =	{Data-Flow Analysis for Multi-Core Computing Systems: A Reminder to Reverse Data-Flow Analysis},
  booktitle =	{Scalable Program Analysis},
  year =	{2008},
  editor =	{Florian Martin and Hanne Riis Nielson and Claudio Riva and Markus Schordan},
  number =	{08161},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2008/1575},
  annote =	{Keywords: Multi-core computing systems, scalable program analysis, reverse data-flow analysis, demand-driven data-flow analysis}
}

@InProceedings{conf/cc/XueK06,
  title =	"A Fresh Look at {PRE} as a Maximum Flow Problem",
  author =	"Jingling Xue and Jens Knoop",
  bibdate =	"2006-04-05",
  bibsource =	"DBLP,
		 http://dblp.uni-trier.de/db/conf/cc/cc2006.html#XueK06",
  booktitle =	"CC",
  booktitle =	"Compiler Construction, 15th International Conference,
		 {CC} 2006, Held as Part of the Joint European
		 Conferences on Theory and Practice of Software, {ETAPS}
		 2006, Vienna, Austria, March 30-31, 2006, Proceedings",
  publisher =	"Springer",
  year = 	"2006",
  volume =	"3923",
  editor =	"Alan Mycroft and Andreas Zeller",
  ISBN = 	"3-540-33050-X",
  pages =	"139--154",
  series =	"Lecture Notes in Computer Science",
  URL =  	"http://dx.doi.org/10.1007/11688839_13",
}

@InProceedings{scholz04,
  author =	"Bernhard Scholz and Nigel Horspool and Jens Knoop",
  title =	"Optimizing for space and time usage with speculative
		 partial redundancy elimination",
  booktitle =	"LCTES '04: Proceedings of the 2004 ACM SIGPLAN/SIGBED
		 conference on Languages, Compilers, and Tools for Embedded Systems",
  year = 	"2004",
  ISBN = 	"1-58113-806-7",
  pages =	"221--230",
  location =	"Washington, DC, USA",
  publisher =	"ACM Press",
}

@InProceedings{HiKr03,
        TITLE       = "{VLIW} Operation Refinement for Reducing Energy Consumption",
        AUTHOR      = "Ulrich Hirnschrott and Andreas Krall",
        BOOKTITLE   = "International Symposium on System-on Chip",
        PUBLISHER   = "IEEE",
        ADDRESS     = "Tampere, Finland",
        YEAR        = "2003",
        PAGES       = "131--134",
}

@Article{Krall+04micro,
  author =       {Andreas Krall and Ulrich Hirnschrott and Christian Panis and Ivan Pryanishnikov},
  title =        {x{DSP}core: {A} {C}ompiler-{B}ased {C}onfigureable {D}igital {S}ignal {P}rocessor},
  journal =      {IEEE Micro},
  year =         {2004},
  OPTkey =       {},
  volume =       {24},
  number =       {4},
  pages =        {67-78},
  month =        {July/August},
  OPTnote =      {},
  OPTannote =    {},
}

@INPROCEEDINGS{FarKrStBrand06,
        TITLE       = {Effective Compiler Generation by Architecture Description},
        AUTHOR      = {Stefan Farfeleder and Andreas Krall and Edwin Steiner and Florian Brandner},
        BOOKTITLE   = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems},
        EDITOR      = {Koen De Bosschere},
        PUBLISHER   = {ACM},
        PAGES       = {145--152},
        ADDRESS     = {Ottawa},
        MONTH       = {June},
        YEAR        = {2006},
        URL         = {http://doi.acm.org/10.1145/1134650.1134671},
}

@ARTICLE{PrKrHo06,
        AUTHOR      = {Ivan Pryanishnikov and Andreas Krall and Nigel Horspool},
        TITLE       = {Compiler Optimizations for Processors with {SIMD} Instructions},
        JOURNAL     = {Software---Practice and Experience},
        PUBLISHER   = {Wiley},
        VOLUME      = {37},
        NUMBER      = {1},
        PAGES       = {93--113},
        YEAR        = {2007},
        URL         = {http://www3.interscience.wiley.com/cgi-bin/fulltext/112783581/PDFSTART},
}

@ARTICLE{FaKrHo07,
        AUTHOR      = {Stefan Farfeleder and Andreas Krall and Nigel Horspool},
        TITLE       = {Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures},
        JOURNAL     = {Journal of Systems Architecture},
        PUBLISHER   = {Elsevier},
        VOLUME      = {53},
        NUMBER      = {8},
        PAGES       = {501--510},
        YEAR        = {2007},
}

@INPROCEEDINGS{MeKr07,
        TITLE       = {Instruction Set Encoding Optimization for Code Size Reduction},
        AUTHOR      = {Michael Med and Andreas Krall},
        BOOKTITLE   = {International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation},
        ADDRESS     = {Samos, Greece},
        PAGES       = {9--17},
        MONTH       = {July},
        YEAR        = {2007}
}

@INPROCEEDINGS{BrEbKr07,
        TITLE       = {Compiler Generation from Structural Architecture Descriptions},
        AUTHOR      = {Florian Brandner and Dietmar Ebner and Andreas Krall},
        BOOKTITLE   = {International Conference on Compilers, Architecture, and Synthesis for Embedded Systems},
        ADDRESS     = {Salzburg, Austria},
        PAGES       = {13--22},
        MONTH       = {September},
        YEAR        = {2007}
}

@INPROCEEDINGS{EbBrSchKrWiKa08,
        TITLE       = {Generalized Instruction Selection using {SSA}-Graphs},
        AUTHOR      = {Dietmar Ebner and Florian Brandner and Bernhard Scholz and Andreas Krall and Peter Wiedermann and Albrecht Kadlec},
        BOOKTITLE   = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems},
        EDITOR      = {John Regehr},
        PUBLISHER   = {ACM},
        PAGES       = {31--40},
        ADDRESS     = {Tucson},
        MONTH       = {June},
        YEAR        = {2008},
}

@INPROCEEDINGS{BrFeKrRi09,
        TITLE       = {Fast and Accurate Simulation using the LLVM Compiler Framework},
        AUTHOR      = {Florian Brandner and Andreas Fellnhofer and Andreas Krall and David Riegler},
        BOOKTITLE   = {Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO'09)},
        EDITOR      = {Smail Niar, Rainer Leupers, Olivier Temam},
        PUBLISHER   = {HiPEAC},
        PAGES       = {1--6},
        ADDRESS     = {Paphos, Cyprus},
        MONTH       = {January},
        YEAR        = {2009},
}
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