--- gforth/prim	2006/10/27 21:47:01	1.200
+++ gforth/prim	2006/10/30 16:20:41	1.203
@@ -849,23 +849,18 @@ DCell d = mmul(n1,n2);
 #else
 DCell d = (DCell)n1 * (DCell)n2;
 #endif
-#ifdef BUGGY_LL_DIV
+#ifdef ASM_SM_SLASH_REM
+ASM_SM_SLASH_REM(DLO(d), DHI(d), n3, n4, n5);
+if (((DHI(d)^n3)<0) && n4!=0) {
+  if (CHECK_DIVISION && n5 == CELL_MIN)
+    throw(BALL_RESULTRANGE);
+  n5--;
+  n4+=n3;
+}
+#else
 DCell r = fmdiv(d,n3);
 n4=DHI(r);
 n5=DLO(r);
-#else
-/* assumes that the processor uses either floored or symmetric division */
-DCell d5 = d/n3;
-n4 = d%n3;
-if (CHECK_DIVISION_SW && n3 == 0)
-  throw(BALL_DIVZERO);
-if (FLOORED_DIV && ((DHI(d)^n3)<0) && n4!=0) {
-  d5--;
-  n4+=n3;
-}
-n5 = d5;
-if (CHECK_DIVISION && d5 != n5)
-  throw(BALL_RESULTRANGE);
 #endif
 :
  >r m* r> fm/mod ;
@@ -877,19 +872,17 @@ DCell d = mmul(n1,n2);
 #else
 DCell d = (DCell)n1 * (DCell)n2;
 #endif
-#ifdef BUGGY_LL_DIV
+#ifdef ASM_SM_SLASH_REM
+Cell remainder;
+ASM_SM_SLASH_REM(DLO(d), DHI(d), n3, remainder, n4);
+if (((DHI(d)^n3)<0) && remainder!=0) {
+  if (CHECK_DIVISION && n4 == CELL_MIN)
+    throw(BALL_RESULTRANGE);
+  n4--;
+}
+#else
 DCell r = fmdiv(d,n3);
 n4=DLO(r);
-#else
-/* assumes that the processor uses either floored or symmetric division */
-DCell d4 = d/n3;
-if (CHECK_DIVISION_SW && n3 == 0)
-  throw(BALL_DIVZERO);
-if (FLOORED_DIV && ((DHI(d)^n3)<0) && (d%n3)!=0)
-  d4--;
-n4 = d4;
-if (CHECK_DIVISION && d4 != n4)
-  throw(BALL_RESULTRANGE);
 #endif
 :
  */mod nip ;
@@ -913,9 +906,8 @@ n2 = n1>>1;
 
 fm/mod	( d1 n1 -- n2 n3 )		core		f_m_slash_mod
 ""Floored division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, @i{n1}>@i{n2}>=0 or 0>=@i{n2}>@i{n1}.""
-#ifdef BUGGY_LL_DIV
 #ifdef ASM_SM_SLASH_REM
-ASM_SM_SLASH_REM(d1.lo, d1.hi, n1, n2, n3);
+ASM_SM_SLASH_REM(DLO(d1), DHI(d1), n1, n2, n3);
 if (((DHI(d1)^n1)<0) && n2!=0) {
   if (CHECK_DIVISION && n3 == CELL_MIN)
     throw(BALL_RESULTRANGE);
@@ -927,31 +919,6 @@ DCell r = fmdiv(d1,n1);
 n2=DHI(r);
 n3=DLO(r);
 #endif /* !defined(ASM_SM_SLASH_REM) */
-#else
-#ifdef ASM_SM_SLASH_REM4
-ASM_SM_SLASH_REM4(d1, n1, n2, n3);
-if (((DHI(d1)^n1)<0) && n2!=0) {
-  if (CHECK_DIVISION && n3 == CELL_MIN)
-    throw(BALL_RESULTRANGE);
-  n3--;
-  n2+=n1;
-}
-#else /* !defined(ASM_SM_SLASH_REM4) */
-/* assumes that the processor uses either floored or symmetric division */
-DCell d3 = d1/n1;
-n2 = d1%n1;
-if (CHECK_DIVISION_SW && n1 == 0)
-  throw(BALL_DIVZERO);
-/* note that this 1%-3>0 is optimized by the compiler */
-if (1%-3>0 && ((DHI(d1)^n1)<0) && n2!=0) {
-  d3--;
-  n2+=n1;
-}
-n3 = d3;
-if (CHECK_DIVISION && d3 != n3)
-  throw(BALL_RESULTRANGE);
-#endif /* !defined(ASM_SM_SLASH_REM4) */
-#endif
 :
  dup >r dup 0< IF  negate >r dnegate r>  THEN
  over       0< IF  tuck + swap  THEN
@@ -960,33 +927,13 @@ if (CHECK_DIVISION && d3 != n3)
 
 sm/rem	( d1 n1 -- n2 n3 )		core		s_m_slash_rem
 ""Symmetric division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, sign(@i{n2})=sign(@i{d1}) or 0.""
-#ifdef BUGGY_LL_DIV
 #ifdef ASM_SM_SLASH_REM
-ASM_SM_SLASH_REM(d1.lo, d1.hi, n1, n2, n3);
+ASM_SM_SLASH_REM(DLO(d1), DHI(d1), n1, n2, n3);
 #else /* !defined(ASM_SM_SLASH_REM) */
 DCell r = smdiv(d1,n1);
 n2=DHI(r);
 n3=DLO(r);
 #endif /* !defined(ASM_SM_SLASH_REM) */
-#else
-#ifdef ASM_SM_SLASH_REM4
-ASM_SM_SLASH_REM4(d1, n1, n2, n3);
-#else /* !defined(ASM_SM_SLASH_REM4) */
-/* assumes that the processor uses either floored or symmetric division */
-DCell d3 = d1/n1;
-n2 = d1%n1;
-if (CHECK_DIVISION_SW && n1 == 0)
-  throw(BALL_DIVZERO);
-/* note that this 1%-3<0 is optimized by the compiler */
-if (1%-3<0 && ((DHI(d1)^n1)<0) && n2!=0) {
-  d3++;
-  n2-=n1;
-}
-n3 = d3;
-if (CHECK_DIVISION && d3 != n3)
-  throw(BALL_RESULTRANGE);
-#endif /* !defined(ASM_SM_SLASH_REM4) */
-#endif
 :
  over >r dup >r abs -rot
  dabs rot um/mod
@@ -1022,27 +969,13 @@ ud = (UDCell)u1 * (UDCell)u2;
 
 um/mod	( ud u1 -- u2 u3 )		core	u_m_slash_mod
 ""ud=u3*u1+u2, u1>u2>=0""
-#ifdef BUGGY_LL_DIV
 #ifdef ASM_UM_SLASH_MOD
-ASM_UM_SLASH_MOD(ud.lo, ud.hi, u1, u2, u3);
+ASM_UM_SLASH_MOD(DLO(ud), DHI(ud), u1, u2, u3);
 #else /* !defined(ASM_UM_SLASH_MOD) */
 UDCell r = umdiv(ud,u1);
 u2=DHI(r);
 u3=DLO(r);
 #endif /* !defined(ASM_UM_SLASH_MOD) */
-#else
-#ifdef ASM_UM_SLASH_MOD4
-ASM_UM_SLASH_MOD4(ud, u1, u2, u3);
-#else /* !defined(ASM_UM_SLASH_MOD4) */
-UDCell ud3 = ud/u1;
-u2 = ud%u1;
-if (CHECK_DIVISION_SW && u1 == 0)
-  throw(BALL_DIVZERO);
-u3 = ud3;
-if (CHECK_DIVISION && ud3 != u3)
-  throw(BALL_RESULTRANGE);
-#endif /* !defined(ASM_UM_SLASH_MOD4) */
-#endif
 :
    0 swap [ 8 cells 1 + ] literal 0
    ?DO /modstep