version 1.161, 2005/01/24 22:18:34
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version 1.164, 2005/01/26 22:06:03
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Line 249 execute ( xt -- ) core
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Line 249 execute ( xt -- ) core
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#ifndef NO_IP |
#ifndef NO_IP |
ip=IP; |
ip=IP; |
#endif |
#endif |
IF_spTOS(spTOS = sp[0]); /* inst_tail would produce a NEXT_P1 */ |
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SUPER_END; |
SUPER_END; |
VM_JUMP(EXEC1(xt)); |
VM_JUMP(EXEC1(xt)); |
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Line 259 perform ( a_addr -- ) gforth
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Line 258 perform ( a_addr -- ) gforth
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#ifndef NO_IP |
#ifndef NO_IP |
ip=IP; |
ip=IP; |
#endif |
#endif |
IF_spTOS(spTOS = sp[0]); /* inst_tail would produce a NEXT_P1 */ |
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SUPER_END; |
SUPER_END; |
VM_JUMP(EXEC1(*(Xt *)a_addr)); |
VM_JUMP(EXEC1(*(Xt *)a_addr)); |
: |
: |
Line 521 if (nstart == nlimit) {
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Line 519 if (nstart == nlimit) {
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JUMP(a_target); |
JUMP(a_target); |
#else |
#else |
SET_IP((Xt *)a_target); |
SET_IP((Xt *)a_target); |
INST_TAIL; NEXT_P2; |
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#endif |
#endif |
} |
} |
SUPER_CONTINUE; |
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: |
: |
2dup = |
2dup = |
IF r> swap rot >r >r |
IF r> swap rot >r >r |
Line 544 if (nstart >= nlimit) {
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Line 540 if (nstart >= nlimit) {
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JUMP(a_target); |
JUMP(a_target); |
#else |
#else |
SET_IP((Xt *)a_target); |
SET_IP((Xt *)a_target); |
INST_TAIL; NEXT_P2; |
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#endif |
#endif |
} |
} |
SUPER_CONTINUE; |
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: |
: |
swap 2dup |
swap 2dup |
r> swap >r swap >r |
r> swap >r swap >r |
Line 567 if (ustart >= ulimit) {
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Line 561 if (ustart >= ulimit) {
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JUMP(a_target); |
JUMP(a_target); |
#else |
#else |
SET_IP((Xt *)a_target); |
SET_IP((Xt *)a_target); |
INST_TAIL; NEXT_P2; |
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#endif |
#endif |
} |
} |
SUPER_CONTINUE; |
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: |
: |
swap 2dup |
swap 2dup |
r> swap >r swap >r |
r> swap >r swap >r |
Line 590 if (nstart <= nlimit) {
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Line 582 if (nstart <= nlimit) {
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JUMP(a_target); |
JUMP(a_target); |
#else |
#else |
SET_IP((Xt *)a_target); |
SET_IP((Xt *)a_target); |
INST_TAIL; NEXT_P2; |
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#endif |
#endif |
} |
} |
SUPER_CONTINUE; |
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: |
: |
swap 2dup |
swap 2dup |
r> swap >r swap >r |
r> swap >r swap >r |
Line 613 if (ustart <= ulimit) {
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Line 603 if (ustart <= ulimit) {
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JUMP(a_target); |
JUMP(a_target); |
#else |
#else |
SET_IP((Xt *)a_target); |
SET_IP((Xt *)a_target); |
INST_TAIL; NEXT_P2; |
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#endif |
#endif |
} |
} |
SUPER_CONTINUE; |
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: |
swap 2dup |
swap 2dup |
r> swap >r swap >r |
r> swap >r swap >r |
Line 817 n = n1*n2;
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Line 805 n = n1*n2;
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/ ( n1 n2 -- n ) core slash |
/ ( n1 n2 -- n ) core slash |
n = n1/n2; |
n = n1/n2; |
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if(FLOORED_DIV && (n1 < 0) != (n2 < 0) && (n1%n2 != 0)) n--; |
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: |
/mod nip ; |
/mod nip ; |
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mod ( n1 n2 -- n ) core |
mod ( n1 n2 -- n ) core |
n = n1%n2; |
n = n1%n2; |
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if(FLOORED_DIV && (n1 < 0) != (n2 < 0) && n!=0) n += n2; |
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: |
/mod drop ; |
/mod drop ; |
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/mod ( n1 n2 -- n3 n4 ) core slash_mod |
/mod ( n1 n2 -- n3 n4 ) core slash_mod |
n4 = n1/n2; |
n4 = n1/n2; |
n3 = n1%n2; /* !! is this correct? look into C standard! */ |
n3 = n1%n2; /* !! is this correct? look into C standard! */ |
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if (FLOORED_DIV && (n1<0) != (n2<0) && n3!=0) { |
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n4--; |
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n3+=n2; |
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} |
: |
: |
>r s>d r> fm/mod ; |
>r s>d r> fm/mod ; |
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*/mod ( n1 n2 n3 -- n4 n5 ) core star_slash_mod |
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""n1*n2=n3*n5+n4, with the intermediate result (n1*n2) being double."" |
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#ifdef BUGGY_LL_MUL |
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DCell d = mmul(n1,n2); |
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#else |
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DCell d = (DCell)n1 * (DCell)n2; |
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#endif |
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#ifdef BUGGY_LL_DIV |
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DCell r = fmdiv(d,n3); |
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n4=DHI(r); |
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n5=DLO(r); |
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#else |
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/* assumes that the processor uses either floored or symmetric division */ |
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n5 = d/n3; |
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n4 = d%n3; |
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if (FLOORED_DIV && (d<0) != (n3<0) && n4!=0) { |
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n5--; |
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n4+=n3; |
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} |
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#endif |
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: |
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>r m* r> fm/mod ; |
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*/ ( n1 n2 n3 -- n4 ) core star_slash |
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""n4=(n1*n2)/n3, with the intermediate result being double."" |
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#ifdef BUGGY_LL_MUL |
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DCell d = mmul(n1,n2); |
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#else |
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DCell d = (DCell)n1 * (DCell)n2; |
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#endif |
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#ifdef BUGGY_LL_DIV |
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DCell r = fmdiv(d,n3); |
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n4=DHI(r); |
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#else |
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/* assumes that the processor uses either floored or symmetric division */ |
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n4 = d/n3; |
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if (FLOORED_DIV && (d<0) != (n3<0) && (d%n3)!=0) n4--; |
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#endif |
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: |
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*/mod nip ; |
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2* ( n1 -- n2 ) core two_star |
2* ( n1 -- n2 ) core two_star |
""Shift left by 1; also works on unsigned numbers"" |
""Shift left by 1; also works on unsigned numbers"" |
n2 = 2*n1; |
n2 = 2*n1; |
Line 852 fm/mod ( d1 n1 -- n2 n3 ) core f_m_sla
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Line 887 fm/mod ( d1 n1 -- n2 n3 ) core f_m_sla
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""Floored division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, @i{n1}>@i{n2}>=0 or 0>=@i{n2}>@i{n1}."" |
""Floored division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, @i{n1}>@i{n2}>=0 or 0>=@i{n2}>@i{n1}."" |
#ifdef BUGGY_LL_DIV |
#ifdef BUGGY_LL_DIV |
DCell r = fmdiv(d1,n1); |
DCell r = fmdiv(d1,n1); |
n2=r.hi; |
n2=DHI(r); |
n3=r.lo; |
n3=DLO(r); |
#else |
#else |
/* assumes that the processor uses either floored or symmetric division */ |
/* assumes that the processor uses either floored or symmetric division */ |
n3 = d1/n1; |
n3 = d1/n1; |
Line 874 sm/rem ( d1 n1 -- n2 n3 ) core s_m_sla
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Line 909 sm/rem ( d1 n1 -- n2 n3 ) core s_m_sla
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""Symmetric division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, sign(@i{n2})=sign(@i{d1}) or 0."" |
""Symmetric division: @i{d1} = @i{n3}*@i{n1}+@i{n2}, sign(@i{n2})=sign(@i{d1}) or 0."" |
#ifdef BUGGY_LL_DIV |
#ifdef BUGGY_LL_DIV |
DCell r = smdiv(d1,n1); |
DCell r = smdiv(d1,n1); |
n2=r.hi; |
n2=DHI(r); |
n3=r.lo; |
n3=DLO(r); |
#else |
#else |
/* assumes that the processor uses either floored or symmetric division */ |
/* assumes that the processor uses either floored or symmetric division */ |
n3 = d1/n1; |
n3 = d1/n1; |
Line 923 um/mod ( ud u1 -- u2 u3 ) core u_m_slas
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Line 958 um/mod ( ud u1 -- u2 u3 ) core u_m_slas
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""ud=u3*u1+u2, u1>u2>=0"" |
""ud=u3*u1+u2, u1>u2>=0"" |
#ifdef BUGGY_LL_DIV |
#ifdef BUGGY_LL_DIV |
UDCell r = umdiv(ud,u1); |
UDCell r = umdiv(ud,u1); |
u2=r.hi; |
u2=DHI(r); |
u3=r.lo; |
u3=DLO(r); |
#else |
#else |
u3 = ud/u1; |
u3 = ud/u1; |
u2 = ud%u1; |
u2 = ud%u1; |