version 1.146, 2003/10/09 20:25:59
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version 1.147, 2003/11/02 22:15:28
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Line 138
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Line 138
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\ Stack caching setup |
\ Stack caching setup |
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\E register IPTOS Cell |
ifdef(`M4_ENGINE_FAST', `include(cache1.vmg)', `include(cache0.vmg)') |
\E register spa Cell |
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\E register spb Cell |
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\E register spc Cell |
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\E register spd Cell |
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\E create IPregs IPTOS , |
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\E create regs spc , spb , spa , |
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\E IPregs 1 0 stack-state IPss1 |
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\E regs 3 cells + 0 0 stack-state ss0 |
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\E regs 2 cells + 1 0 stack-state ss1 |
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\E regs 1 cells + 2 1 stack-state ss2 |
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\E regs 0 cells + 3 2 stack-state ss3 |
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\ the first of these is the default state |
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\E state S0 |
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\E state S1 |
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\E state S2 |
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\E state S3 |
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\E ss0 data-stack S0 set-ss |
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\E ss1 data-stack S1 set-ss |
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\E ss2 data-stack S2 set-ss |
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\E ss3 data-stack S3 set-ss |
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\E IPss1 inst-stream S0 set-ss |
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\E IPss1 inst-stream S1 set-ss |
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\E IPss1 inst-stream S2 set-ss |
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\E IPss1 inst-stream S3 set-ss |
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\E data-stack to cache-stack |
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\E here 4 cache-states 2! s0 , s1 , s2 , s3 , |
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\ !! the following should be automatic |
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\E S0 to state-default |
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\E state-default to state-in |
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\E state-default to state-out |
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\ these m4 macros would collide with identifiers |
\ these m4 macros would collide with identifiers |
undefine(`index') |
undefine(`index') |
Line 2566 a_addr = groups;
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Line 2529 a_addr = groups;
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\g static_super |
\g static_super |
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\C #if !defined(GFORTH_DEBUGGING) && !defined(INDIRECT_THREADED) && !defined(DOUBLY_INDIRECT) && !defined(VM_PROFILING) |
ifdef(`M4_ENGINE_FAST', |
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`include(peeprules.vmg)') |
include(peeprules.vmg) |
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\C #endif |
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\g end |
\g end |