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version 1.63, 2000/07/24 18:59:58 version 1.64, 2000/07/31 21:00:26
Line 8852  to ensure that the end is recognized. Line 8852  to ensure that the end is recognized.
 @node 386 Assembler, Alpha Assembler, Common Disassembler, Assembler and Code Words  @node 386 Assembler, Alpha Assembler, Common Disassembler, Assembler and Code Words
 @subsection 386 Assembler  @subsection 386 Assembler
   
 The 386 assembler and disassembler included in Gforth was written by  The 386 assembler included in Gforth was written by Bernd Paysan, it's
 Andrew McKewan; it is in the public domain.  available under GPL, and originally part of bigFORTH.
   
   The 386 disassembler included in Gforth was written by Andrew McKewan
   and is in the public domain.
   
 The disassembler displays code in prefix Intel syntax.  The disassembler displays code in prefix Intel syntax.
   
 The assembler uses an Intel-inspired postfix syntax with reversed  The assembler uses a postfix syntax with reversed parameters.
 parameters.  As usual, a @code{,} is appended to the instruction names  
 (including @code{rep,} etc.).  The assembler includes all instruction of the Athlon, i.e. 486 core
   instructions, Pentium and PPro extensions, floating point, MMX, 3Dnow!,
 The assembler is somewhat meager, missing a number of instructions  but not ISSE. It's an integrated 16- and 32-bit assembler. Default is 32
 (including FP) and absolute memory addressing modes.  bit, you can switch to 16 bit with .86 and back to 32 bit with .386.
   
 The registers have their usual names @code{eax} etc.  Immediate values  There are several prefixes to switch between different operation sizes,
 are indicated by postfixing them with @code{#}, e.g., @code{3 #}.  Here  @code{.b} for byte accesses, @code{.w} for word accesses, @code{.d} for
 are some examples of addressing modes:  double-word accesses. Addressing modes can be switched with @code{.wa}
   for 16 bit addresses, and @code{.da} for 32 bit addresses. You don't
   need a prefix for byte register names (@code{AL} et al).
   
   For floating point operations, the prefixes are @code{.fs} (IEEE
   single), @code{.fl} (IEEE double), @code{.fx} (extended), @code{.fw}
   (word), @code{.fd} (double-word), and @code{.fq} (quad-word).
   
   The MMX opcodes don't have size prefixes, they are spelled out like in
   the Intel assembler. Instead of move from and to memory, there are
   PLDQ/PLDD and PSTQ/PSTD.
   
   The registers lack the 'e' prefix; even in 32 bit mode, eax is called
   ax.  Immediate values are indicated by postfixing them with @code{#},
   e.g., @code{3 #}.  Here are some examples of addressing modes:
   
 @example  @example
 3 #  3 #
 eax  ax
 100 [edi]  100 di d)
 4 [ebx] [ecx]  4 bx cx di)
 0 [edi] [eax] *4 \ base register required!  di ax *4 i)
   20 ax *4 i#)
 @end example  @end example
   
 Some example of instructions are:  Some example of instructions are:
   
 @example  @example
 EAX EBX MOV,             \ move ebx,eax  ax bx mov             \ move ebx,eax
 3 # EAX MOV,             \ mov eax,3  3 # ax mov            \ mov eax,3
 100 [EDI] EAX MOV,       \ mov eax,100[edi]  100 di ) ax mov       \ mov eax,100[edi]
 4 [EBX] [ECX] EAX MOV,   \ mov eax,4[ebx][ecx]  4 bx cx di) ax mov    \ mov eax,4[ebx][ecx]
 16: EAX EBX MOV,         \ mov bx,ax  .w ax bx mov          \ mov bx,ax
 @end example  @end example
   
 You cannot use the prefix @code{16:} with immediate operands.  The  The following forms are supported for binary instructions:
 following forms are supported for binary instructions:  
   
 @example  @example
 <reg> <reg> <inst>  <reg> <reg> <inst>
Line 8899  following forms are supported for binary Line 8916  following forms are supported for binary
 Immediate to memory is not supported.  The shift/rotate syntax is:  Immediate to memory is not supported.  The shift/rotate syntax is:
   
 @example  @example
 <reg/mem> shl,  <reg/mem> 1 # shl \ shortens to shift without immediate
 <reg/mem> 4 shl,  <reg/mem> 4 # shl
 <reg/mem> cl shl,  <reg/mem> cl shl
 @end example  @end example
   
 Precede string instructions (@code{movs,} etc.) with @code{byte} to get  Precede string instructions (@code{movs} etc.) with @code{.b} to get
 the byte version.  the byte version.
   
 The control structure words @code{if,} @code{until,} etc. must be  The control structure words @code{IF} @code{UNTIL} etc. must be
 preceded by one of these conditions: @code{0= 0< u< u> < > ov ecx0<>}.  preceded by one of these conditions: 
 You can invert the condition with @code{not} (Note that most of these  @code{vs vc u< u>= 0= 0<> u<= u> 0< 0>= ps pc < >= <= >}. (Note that most 
 words shadow some Forth words when @code{assembler} is before  of these words shadow some Forth words when @code{assembler} is before
 @code{forth} in the search path, e.g., in code words).  Currently the  @code{forth} in the search path, e.g., in code words).  Currently the
 control structure words use one stack item, so you have to use  control structure words use one stack item, so you have to use
 @code{roll} instead of @code{cs-roll} to shuffle them (you can also use  @code{roll} instead of @code{cs-roll} to shuffle them (you can also use
Removed from v.1.63  
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  Added in v.1.64

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