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undid changes to copyright notices

    1: /*
    2:   This is the machine-specific part for Intel 386 compatible processors
    3: 
    4:   Copyright (C) 1995,1996,1997,1998,2000 Free Software Foundation, Inc.
    5: 
    6:   This file is part of Gforth.
    7: 
    8:   Gforth is free software; you can redistribute it and/or
    9:   modify it under the terms of the GNU General Public License
   10:   as published by the Free Software Foundation; either version 2
   11:   of the License, or (at your option) any later version.
   12: 
   13:   This program is distributed in the hope that it will be useful,
   14:   but WITHOUT ANY WARRANTY; without even the implied warranty of
   15:   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   16:   GNU General Public License for more details.
   17: 
   18:   You should have received a copy of the GNU General Public License
   19:   along with this program; if not, write to the Free Software
   20:   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111, USA.
   21: */
   22: 
   23: #ifdef HAVE_LIBKERNEL32
   24: #ifdef i386
   25: #define SYSCALL     __attribute__ ((stdcall))
   26: #endif
   27: #endif
   28: 
   29: #ifndef THREADING_SCHEME
   30: #define THREADING_SCHEME 8
   31: #endif
   32: 
   33: #if (((__GNUC__==2 && defined(__GNUC_MINOR__) && __GNUC_MINOR__>=95) || (__GNUC__>2))) && defined(FORCE_REG)
   34: #if !defined(USE_TOS) && !defined(USE_NO_TOS)
   35: #define USE_TOS
   36: #endif
   37: #endif
   38: #define MEMCMP_AS_SUBROUTINE 1
   39: 
   40: #ifndef USE_FTOS
   41: #ifndef USE_NO_FTOS
   42: /* gcc can't keep TOS in a register on the 386, so don't try */
   43: #define USE_NO_FTOS
   44: #endif
   45: #endif
   46: 
   47: #include "../generic/machine.h"
   48: 
   49: /* define this if the processor cannot exploit instruction-level
   50:    parallelism (no pipelining or too few registers) */
   51: #define CISC_NEXT
   52: 
   53: /* 386 and below have no cache, 486 has a shared cache, and the
   54:    Pentium and later employ hardware cache consistency, so
   55:    flush-icache is a noop */
   56: #define FLUSH_ICACHE(addr,size)
   57: 
   58: #if defined(FORCE_REG) && !defined(DOUBLY_INDIRECT)
   59: #if (__GNUC__==2 && defined(__GNUC_MINOR__) && __GNUC_MINOR__==5)
   60: /* i.e. gcc-2.5.x */
   61: /* this works with 2.5.7; nothing works with 2.5.8 */
   62: #define IPREG asm("%esi")
   63: #define SPREG asm("%edi")
   64: #if 0
   65: #ifdef USE_TOS
   66: #define CFAREG asm("%ecx")
   67: #else
   68: #define CFAREG asm("%edx")
   69: #endif
   70: #endif
   71: #else /* !gcc-2.5.x */
   72: /* this works with 2.6.3 (and quite well, too) */
   73: /* since this is not very demanding, it's the default for other gcc versions */
   74: #if defined(USE_TOS) && !defined(CFA_NEXT)
   75: #if ((__GNUC__==2 && defined(__GNUC_MINOR__) && __GNUC_MINOR__>=95) || (__GNUC__>2))
   76:      /* gcc 2.95 has a better register allocater */
   77: #define SPREG asm("%esi")
   78: #define RPREG asm("%edi")
   79: #define IPREG asm("%ebx")
   80: /* ebp leads to broken code (gcc-3.0); eax, ecx, edx produce compile errors */
   81: #define TOSREG asm("%ecx")
   82: /* ecx works only for TOS, and eax, edx don't work for anything (gcc-3.0) */
   83: #else /* !(gcc-2.95 or later) */
   84: #define IPREG asm("%ebx")
   85: #endif /* !(gcc-2.95 or later) */
   86: #else /* !defined(USE_TOS) || defined(CFA_NEXT) */
   87: #if ((__GNUC__==2 && defined(__GNUC_MINOR__) && __GNUC_MINOR__>=95) || (__GNUC__>2))
   88: #define SPREG asm("%esi")
   89: #define RPREG asm("%edi")
   90: #define IPREG asm("%ebx")
   91: #else /* !(gcc-2.95 or later) */
   92: #define SPREG asm("%ebx")
   93: #endif  /* !(gcc-2.95 or later) */
   94: #endif /* !defined(USE_TOS) || defined(CFA_NEXT) */
   95: #endif /* !gcc-2.5.x */
   96: #endif /* defined(FORCE_REG) && !defined(DOUBLY_INDIRECT) */
   97: 
   98: /* #define ALIGNMENT_CHECK 1 */