Viktor Pavlu



Dipl.-Ing. Viktor PAVLU
Optimal Code Generation for Explicitly Parallel Processors

Institute of Computer Languages E185/1
Vienna University of Technology

Argentinierstraße 8 / 185
A-1040 Wien, AUSTRIA

fax: (+431) 58801-18399
tel.: (+431) 58801-18359

About Me

Viktor Pavlu is currently a research assistant and PhD student at the Institute of Computer Languages at the Vienna University of Technology.

Research Interests

My current research aims at fast, cycle accurate simulation of explicitly parallel architectures on AMD64 by JIT binary translation using the open source LLVM compiler infrastructure.


Static Analysis Tool Integration Engine: SATIrE

I am user and contributor to this project. The work that lead to my master's thesis was focused on shape analyses and the extraction of alias information from shape analysis results.


The LLVM Compiler Infrastructure
Open source compiler infrastructure for static and dynamic compilation. Our compiler backend is developed for the LLVM infrastructure. In addition, the LLVM JIT is used in our simulator for binary translation.

Basic Operations on Linked Lists (C++)
Recursive and iterative implementations of the following operations on linked lists: insert, remove, delall, search, append, merge, reverse. The recursive procedures are based on the C procedures found in Rinetzky/Sagiv [2001]. The iterative procedures for 'insert' and 'reverse' are based on the procedures found in Sagiv/Reps/Wilhelm [1998].

Viktor Pavlu
Faculty of Informatics
Vienna University of Technology
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