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| 1 : | andi | 1.1 | @article{Hoare, |
| 2 : | author = {Tony Hoare}, | ||
| 3 : | title = {The verifying compiler: A grand challenge for computing research}, | ||
| 4 : | journal = {Journal of the ACM}, | ||
| 5 : | volume = {50}, | ||
| 6 : | number = {1}, | ||
| 7 : | year = {2003}, | ||
| 8 : | issn = {0004-5411}, | ||
| 9 : | pages = {63--69}, | ||
| 10 : | doi = {http://doi.acm.org/10.1145/602382.602403}, | ||
| 11 : | publisher = {ACM}, | ||
| 12 : | address = {New York, NY, USA}, | ||
| 13 : | } | ||
| 14 : | |||
| 15 : | @article{1328444, | ||
| 16 : | author = {Jean-Baptiste Tristan and Xavier Leroy}, | ||
| 17 : | title = {Formal verification of translation validators: a case study on instruction scheduling optimizations}, | ||
| 18 : | journal = {SIGPLAN Not.}, | ||
| 19 : | volume = {43}, | ||
| 20 : | number = {1}, | ||
| 21 : | year = {2008}, | ||
| 22 : | issn = {0362-1340}, | ||
| 23 : | pages = {17--27}, | ||
| 24 : | doi = {http://doi.acm.org/10.1145/1328897.1328444}, | ||
| 25 : | publisher = {ACM}, | ||
| 26 : | address = {New York, NY, USA}, | ||
| 27 : | } | ||
| 28 : | |||
| 29 : | @article{1314860, | ||
| 30 : | author = {Jan Olaf Blech and Arnd Poetzsch-Heffter}, | ||
| 31 : | title = {A Certifying Code Generation Phase}, | ||
| 32 : | journal = {Electron. Notes Theor. Comput. Sci.}, | ||
| 33 : | volume = {190}, | ||
| 34 : | number = {4}, | ||
| 35 : | year = {2007}, | ||
| 36 : | issn = {1571-0661}, | ||
| 37 : | pages = {65--82}, | ||
| 38 : | doi = {http://dx.doi.org/10.1016/j.entcs.2007.09.008}, | ||
| 39 : | publisher = {Elsevier Science Publishers B. V.}, | ||
| 40 : | address = {Amsterdam, The Netherlands, The Netherlands}, | ||
| 41 : | } | ||
| 42 : | andi | 1.2 | |
| 43 : | @inproceedings{Blome+06, | ||
| 44 : | author = {Jason A. Blome and Shantanu Gupta and Shuguang Feng and Scott Mahlke}, | ||
| 45 : | title = {Cost-efficient soft error protection for embedded microprocessors}, | ||
| 46 : | booktitle = {International Conference on Compilers, Architecture and Synthesis | ||
| 47 : | for Embedded Systems (CASES'06)}, | ||
| 48 : | year = {2006}, | ||
| 49 : | isbn = {1-59593-543-6}, | ||
| 50 : | pages = {421--431}, | ||
| 51 : | location = {Seoul, Korea}, | ||
| 52 : | publisher = {ACM}, | ||
| 53 : | address = {New York, NY, USA}, | ||
| 54 : | } | ||
| 55 : | |||
| 56 : | @INPROCEEDINGS{LeeShrivastava09a, | ||
| 57 : | TITLE = {Compiler-Managed Register File Protection for Energy-Efficient Soft Error Reduction}, | ||
| 58 : | AUTHOR = {Jongeun Lee and Aviral Shrivastava}, | ||
| 59 : | BOOKTITLE = {Asia and South-Pacific Design Automation Conference}, | ||
| 60 : | EDITOR = {Ren-Song Tsay}, | ||
| 61 : | PAGES = {618--623}, | ||
| 62 : | LOCATION = {Yokohama, Japan}, | ||
| 63 : | PUBLISHER = {IEEE,ACM}, | ||
| 64 : | MONTH = {January}, | ||
| 65 : | YEAR = {2009}, | ||
| 66 : | } | ||
| 67 : | |||
| 68 : | @INPROCEEDINGS{LeeShrivastava09c, | ||
| 69 : | andi | 1.1 | TITLE = {A Compiler Optimization to Reduce Soft Errors in Register Files}, |
| 70 : | AUTHOR = {Jongeun Lee and Aviral Shrivastava}, | ||
| 71 : | BOOKTITLE = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems}, | ||
| 72 : | EDITOR = {Mahmut Kandemir}, | ||
| 73 : | PUBLISHER = {ACM}, | ||
| 74 : | andi | 1.2 | PAGES = {41--49}, |
| 75 : | LOCATION = {Dublin, Ireland}, | ||
| 76 : | ADDRESS = {New York, NY, USA}, | ||
| 77 : | andi | 1.1 | MONTH = {June}, |
| 78 : | YEAR = {2009}, | ||
| 79 : | } | ||
| 80 : | |||
| 81 : | andi | 1.3 | @inproceedings{Reis+05, |
| 82 : | author = {George A. Reis and Jonathan Chang and Neil Vachharajani and Ram Rangan and David I. August}, | ||
| 83 : | title = {{SWIFT}: Software Implemented Fault Tolerance}, | ||
| 84 : | booktitle = {International Symposium on Code Generation and Optimization (CGO '05)}, | ||
| 85 : | year = {2005}, | ||
| 86 : | isbn = {0-7695-2298-X}, | ||
| 87 : | pages = {243--254}, | ||
| 88 : | publisher = {IEEE Computer Society}, | ||
| 89 : | address = {Washington, DC, USA}, | ||
| 90 : | } | ||
| 91 : | |||
| 92 : | @inproceedings{WapplerMueller08, | ||
| 93 : | author = {Ute Wappler and Martin M\"{u}ller}, | ||
| 94 : | title = {Software Protection Mechanisms for Dependable Systems}, | ||
| 95 : | booktitle = {Conference on Design, Automation and Test in Europe (DATE '08)}, | ||
| 96 : | year = {2008}, | ||
| 97 : | isbn = {978-3-9810801-3-1}, | ||
| 98 : | pages = {947--952}, | ||
| 99 : | location = {Munich, Germany}, | ||
| 100 : | publisher = {ACM}, | ||
| 101 : | address = {New York, NY, USA}, | ||
| 102 : | } | ||
| 103 : | andi | 1.4 | |
| 104 : | @ARTICLE{Oh+02a, | ||
| 105 : | title={Error detection by duplicated instructions in super-scalar processors}, | ||
| 106 : | author={Oh, N. and Shirvani, P.P. and McCluskey, E.J.}, | ||
| 107 : | journal={Reliability, IEEE Transactions on}, | ||
| 108 : | year={2002}, | ||
| 109 : | month={Mar}, | ||
| 110 : | volume={51}, | ||
| 111 : | number={1}, | ||
| 112 : | pages={63-75}, | ||
| 113 : | keywords={error detection, instruction sets, parallel architectures, software fault tolerance, software reliabilityconcurrent error detection, error detection by duplicated instructions, error-detection coverage, error-detection coverage estimation, execution time overhead, fault tolerance, fault-coverage, instruction-level parallelism, instruction-scheduling, instructions duplication, memory code segment fault, performance overhead reduction, probabilistic methods, registers, single event upset, software technique, super-scalar processors, system operation, transient fault}, | ||
| 114 : | doi={10.1109/24.994913}, | ||
| 115 : | ISSN={0018-9529}, } | ||
| 116 : | |||
| 117 : | @ARTICLE{Oh+02b, | ||
| 118 : | title={Control-flow checking by software signatures}, | ||
| 119 : | author={Oh, N. and Shirvani, P.P. and McCluskey, E.J.}, | ||
| 120 : | journal={Reliability, IEEE Transactions on}, | ||
| 121 : | year={2002}, | ||
| 122 : | month={Mar}, | ||
| 123 : | volume={51}, | ||
| 124 : | number={1}, | ||
| 125 : | pages={111-122}, | ||
| 126 : | keywords={program diagnostics, program testing, software reliabilityassigned signatures, branching fault injection experiment, branching faults, code size reduction, compilation time, control flow checking by software signatures, error detection instructions, execution time overhead reduction, instructions checking, multitasking environment, program graph, run-time signatures, signature monitoring techniques, software method, undetected incorrect outputs, watchdog task}, | ||
| 127 : | doi={10.1109/24.994926}, | ||
| 128 : | ISSN={0018-9529}, } | ||
| 129 : | |||
| 130 : | @ARTICLE{Oh+02c, | ||
| 131 : | title={Error detection by selective procedure call duplication for low energy consumption}, | ||
| 132 : | author={Nahmshuk Oh, Nahmshuk and Edward J. McCluskey}, | ||
| 133 : | journal={IEEE Transactions onReliability}, | ||
| 134 : | year={2002}, | ||
| 135 : | month={Dec}, | ||
| 136 : | volume={51}, | ||
| 137 : | number={4}, | ||
| 138 : | pages={ 392-402}, | ||
| 139 : | keywords={ error detection, fault tolerant computing, power consumption, software fault tolerance commercial off-the-shelf components, data integrity, energy consumption reduction, error detection, error-detection latency, error-detection overhead minimisation, fault tolerance, hardware fault-tolerant techniques, instruction duplication, low energy consumption, low energy technique, low power technique, procedure cloning, selective procedure call duplication, software error detection, system reliability improvement, system-on-chip design technique, transient errors detection}, | ||
| 140 : | doi={10.1109/TR.2002.804735}, | ||
| 141 : | ISSN={0018-9529}, } | ||
| 142 : | |||
| 143 : | andi | 1.1 | @BOOK{MishraDutt08, |
| 144 : | TITLE = {Processor Description Languages}, | ||
| 145 : | AUTHOR = {Prabhat Mishra and Nikil Dutt (Editor)}, | ||
| 146 : | PUBLISHER = {Morgan Kaufmann}, | ||
| 147 : | YEAR = {2008}, | ||
| 148 : | } | ||
| 149 : | |||
| 150 : | andi | 1.4 | @InProceedings{BrooksTiwariMartonosi00, |
| 151 : | author = "David Brooks and Vivek Tiwari and Margaret Martonosi", | ||
| 152 : | title = "Wattch: {A} Framework for Architectural-Level Power | ||
| 153 : | Analysis and Optimizations", | ||
| 154 : | booktitle = "Proceedings of the 27th Annual International Symposium | ||
| 155 : | on Computer Architecture", | ||
| 156 : | location = "Vancouver, British Columbia", | ||
| 157 : | organization = "IEEE Computer Society and ACM SIGARCH", | ||
| 158 : | month = "June" # " 12--14,", | ||
| 159 : | year = "2000", | ||
| 160 : | pages = "83--94", | ||
| 161 : | } | ||
| 162 : | |||
| 163 : | |||
| 164 : | andi | 1.1 | @InProceedings{SchrSchoKn09, |
| 165 : | TITLE = "Adding Timing-Awareness to {AUTOSAR} Basic-Software - A Component Based Approach", | ||
| 166 : | AUTHOR = "Dietmar Schreiner and Markus Schordan and Jens Knoop", | ||
| 167 : | BOOKTITLE = "12th IEEE International Symposium on Object/component/service-oriented | ||
| 168 : | Real-time distributed Computing (ISORC 2009)", | ||
| 169 : | PUBLISHER = "IEEE", | ||
| 170 : | ADDRESS = "Tokyo, Japan", | ||
| 171 : | YEAR = "2009", | ||
| 172 : | MONTH = "March", | ||
| 173 : | PAGES = "288--292", | ||
| 174 : | } | ||
| 175 : | |||
| 176 : | @inproceedings{Prantl:WLPE2008, | ||
| 177 : | Address = {Udine, Italy}, | ||
| 178 : | Author = {Adrian Prantl and Jens Knoop and Markus Schordan and Markus Triska}, | ||
| 179 : | Booktitle = {The 18th Workshop on Logic-based methods in Programming Environments (WLPE 2008)}, | ||
| 180 : | Month = {December 12}, | ||
| 181 : | Title = {Constraint solving for high-level WCET analysis}, | ||
| 182 : | Year = {2008}, | ||
| 183 : | URL = {http://costa.tuwien.ac.at/papers/wlpe08.pdf} | ||
| 184 : | } | ||
| 185 : | |||
| 186 : | @InProceedings{prantl_et_al:DSP:2008:1661, | ||
| 187 : | author = "Adrian Prantl and Markus Schordan and Jens Knoop", | ||
| 188 : | title = "TuBound - {A} Conceptually New Tool for Worst-Case | ||
| 189 : | Execution Time Analysis", | ||
| 190 : | booktitle = "8th Intl. Workshop on Worst-Case Execution Time (WCET) | ||
| 191 : | Analysis", | ||
| 192 : | year = "2008", | ||
| 193 : | editor = "Raimund Kirner", | ||
| 194 : | publisher = "Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, | ||
| 195 : | Germany", | ||
| 196 : | address = "Dagstuhl, Germany", | ||
| 197 : | URL = "http://drops.dagstuhl.de/opus/volltexte/2008/1661", | ||
| 198 : | annote = "Keywords: Worst-case execution time (WCET) analysis, | ||
| 199 : | Tool Chain, Flow Constraints, Source-To-Source", | ||
| 200 : | ISBN = "978-3-939897-10-1", | ||
| 201 : | note = "also published in print by Austrian Computer Society | ||
| 202 : | (OCG) under ISBN 978-3-85403-237-3", | ||
| 203 : | } | ||
| 204 : | |||
| 205 : | @InProceedings{kirner_et_al:DSP:2008:1657, | ||
| 206 : | author = "Raimund Kirner and Albrecht Kadlec and Adrian Prantl | ||
| 207 : | and Markus Schordan and Jens Knoop", | ||
| 208 : | title = "Towards a Common {WCET} Annotation Language: Essential | ||
| 209 : | Ingredients", | ||
| 210 : | booktitle = "8th Intl. Workshop on Worst-Case Execution Time (WCET) | ||
| 211 : | Analysis", | ||
| 212 : | year = "2008", | ||
| 213 : | editor = "Raimund Kirner", | ||
| 214 : | publisher = "Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, | ||
| 215 : | Germany", | ||
| 216 : | address = "Dagstuhl, Germany", | ||
| 217 : | URL = "http://drops.dagstuhl.de/opus/volltexte/2008/1657", | ||
| 218 : | annote = "Keywords: Worst-case execution time (WCET) analysis, | ||
| 219 : | annotation languages, WCET annotation language | ||
| 220 : | challenge", | ||
| 221 : | ISBN = "978-3-939897-10-1", | ||
| 222 : | note = "also published in print by Austrian Computer Society | ||
| 223 : | (OCG) under ISBN 978-3-85403-237-3", | ||
| 224 : | } | ||
| 225 : | |||
| 226 : | @InProceedings{kirner_et_al:DSP:2007:1197, | ||
| 227 : | author = "Raimund Kirner and Jens Knoop and Adrian Prantl and | ||
| 228 : | Markus Schordan and Ingomar Wenzel", | ||
| 229 : | title = "{WCET} Analysis: The Annotation Language Challenge", | ||
| 230 : | booktitle = "7th Intl. Workshop on Worst-Case Execution Time (WCET) | ||
| 231 : | Analysis", | ||
| 232 : | year = "2007", | ||
| 233 : | editor = "Christine Rochange", | ||
| 234 : | publisher = "Internationales Begegnungs- und Forschungszentrum | ||
| 235 : | f{"u}r Informatik (IBFI), Schloss Dagstuhl, Germany", | ||
| 236 : | address = "Dagstuhl, Germany", | ||
| 237 : | URL = "http://drops.dagstuhl.de/opus/volltexte/2007/1197", | ||
| 238 : | annote = "Keywords: Worst-case execution time analysis, WCET, | ||
| 239 : | path description, annotation language challenge, | ||
| 240 : | expressiveness, convenience", | ||
| 241 : | } | ||
| 242 : | |||
| 243 : | |||
| 244 : | @InProceedings{knoop:DSP:2008:1575, | ||
| 245 : | author = {Jens Knoop}, | ||
| 246 : | title = {Data-Flow Analysis for Multi-Core Computing Systems: A Reminder to Reverse Data-Flow Analysis}, | ||
| 247 : | booktitle = {Scalable Program Analysis}, | ||
| 248 : | year = {2008}, | ||
| 249 : | editor = {Florian Martin and Hanne Riis Nielson and Claudio Riva and Markus Schordan}, | ||
| 250 : | number = {08161}, | ||
| 251 : | series = {Dagstuhl Seminar Proceedings}, | ||
| 252 : | ISSN = {1862-4405}, | ||
| 253 : | publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany}, | ||
| 254 : | address = {Dagstuhl, Germany}, | ||
| 255 : | URL = {http://drops.dagstuhl.de/opus/volltexte/2008/1575}, | ||
| 256 : | annote = {Keywords: Multi-core computing systems, scalable program analysis, reverse data-flow analysis, demand-driven data-flow analysis} | ||
| 257 : | } | ||
| 258 : | |||
| 259 : | @InProceedings{conf/cc/XueK06, | ||
| 260 : | title = "A Fresh Look at {PRE} as a Maximum Flow Problem", | ||
| 261 : | author = "Jingling Xue and Jens Knoop", | ||
| 262 : | bibdate = "2006-04-05", | ||
| 263 : | bibsource = "DBLP, | ||
| 264 : | http://dblp.uni-trier.de/db/conf/cc/cc2006.html#XueK06", | ||
| 265 : | booktitle = "CC", | ||
| 266 : | booktitle = "Compiler Construction, 15th International Conference, | ||
| 267 : | {CC} 2006, Held as Part of the Joint European | ||
| 268 : | Conferences on Theory and Practice of Software, {ETAPS} | ||
| 269 : | 2006, Vienna, Austria, March 30-31, 2006, Proceedings", | ||
| 270 : | publisher = "Springer", | ||
| 271 : | year = "2006", | ||
| 272 : | volume = "3923", | ||
| 273 : | editor = "Alan Mycroft and Andreas Zeller", | ||
| 274 : | ISBN = "3-540-33050-X", | ||
| 275 : | pages = "139--154", | ||
| 276 : | series = "Lecture Notes in Computer Science", | ||
| 277 : | URL = "http://dx.doi.org/10.1007/11688839_13", | ||
| 278 : | } | ||
| 279 : | |||
| 280 : | @InProceedings{scholz04, | ||
| 281 : | author = "Bernhard Scholz and Nigel Horspool and Jens Knoop", | ||
| 282 : | title = "Optimizing for space and time usage with speculative | ||
| 283 : | partial redundancy elimination", | ||
| 284 : | booktitle = "LCTES '04: Proceedings of the 2004 ACM SIGPLAN/SIGBED | ||
| 285 : | conference on Languages, Compilers, and Tools for Embedded Systems", | ||
| 286 : | year = "2004", | ||
| 287 : | ISBN = "1-58113-806-7", | ||
| 288 : | pages = "221--230", | ||
| 289 : | location = "Washington, DC, USA", | ||
| 290 : | publisher = "ACM Press", | ||
| 291 : | } | ||
| 292 : | |||
| 293 : | |||
| 294 : | @InProceedings{HiKr03, | ||
| 295 : | TITLE = "{VLIW} Operation Refinement for Reducing Energy Consumption", | ||
| 296 : | AUTHOR = "Ulrich Hirnschrott and Andreas Krall", | ||
| 297 : | BOOKTITLE = "International Symposium on System-on Chip", | ||
| 298 : | PUBLISHER = "IEEE", | ||
| 299 : | ADDRESS = "Tampere, Finland", | ||
| 300 : | YEAR = "2003", | ||
| 301 : | PAGES = "131--134", | ||
| 302 : | } | ||
| 303 : | |||
| 304 : | @Article{Krall+04micro, | ||
| 305 : | author = {Andreas Krall and Ulrich Hirnschrott and Christian Panis and Ivan Pryanishnikov}, | ||
| 306 : | title = {x{DSP}core: {A} {C}ompiler-{B}ased {C}onfigureable {D}igital {S}ignal {P}rocessor}, | ||
| 307 : | journal = {IEEE Micro}, | ||
| 308 : | year = {2004}, | ||
| 309 : | OPTkey = {}, | ||
| 310 : | volume = {24}, | ||
| 311 : | number = {4}, | ||
| 312 : | pages = {67-78}, | ||
| 313 : | month = {July/August}, | ||
| 314 : | OPTnote = {}, | ||
| 315 : | OPTannote = {}, | ||
| 316 : | } | ||
| 317 : | |||
| 318 : | @INPROCEEDINGS{FarKrStBrand06, | ||
| 319 : | TITLE = {Effective Compiler Generation by Architecture Description}, | ||
| 320 : | AUTHOR = {Stefan Farfeleder and Andreas Krall and Edwin Steiner and Florian Brandner}, | ||
| 321 : | BOOKTITLE = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems}, | ||
| 322 : | EDITOR = {Koen De Bosschere}, | ||
| 323 : | PUBLISHER = {ACM}, | ||
| 324 : | PAGES = {145--152}, | ||
| 325 : | ADDRESS = {Ottawa}, | ||
| 326 : | MONTH = {June}, | ||
| 327 : | YEAR = {2006}, | ||
| 328 : | URL = {http://doi.acm.org/10.1145/1134650.1134671}, | ||
| 329 : | } | ||
| 330 : | |||
| 331 : | @ARTICLE{PrKrHo06, | ||
| 332 : | AUTHOR = {Ivan Pryanishnikov and Andreas Krall and Nigel Horspool}, | ||
| 333 : | TITLE = {Compiler Optimizations for Processors with {SIMD} Instructions}, | ||
| 334 : | JOURNAL = {Software---Practice and Experience}, | ||
| 335 : | PUBLISHER = {Wiley}, | ||
| 336 : | VOLUME = {37}, | ||
| 337 : | NUMBER = {1}, | ||
| 338 : | PAGES = {93--113}, | ||
| 339 : | YEAR = {2007}, | ||
| 340 : | URL = {http://www3.interscience.wiley.com/cgi-bin/fulltext/112783581/PDFSTART}, | ||
| 341 : | } | ||
| 342 : | |||
| 343 : | @ARTICLE{FaKrHo07, | ||
| 344 : | AUTHOR = {Stefan Farfeleder and Andreas Krall and Nigel Horspool}, | ||
| 345 : | TITLE = {Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures}, | ||
| 346 : | JOURNAL = {Journal of Systems Architecture}, | ||
| 347 : | PUBLISHER = {Elsevier}, | ||
| 348 : | VOLUME = {53}, | ||
| 349 : | NUMBER = {8}, | ||
| 350 : | PAGES = {501--510}, | ||
| 351 : | YEAR = {2007}, | ||
| 352 : | } | ||
| 353 : | |||
| 354 : | @INPROCEEDINGS{MeKr07, | ||
| 355 : | TITLE = {Instruction Set Encoding Optimization for Code Size Reduction}, | ||
| 356 : | AUTHOR = {Michael Med and Andreas Krall}, | ||
| 357 : | BOOKTITLE = {International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation}, | ||
| 358 : | ADDRESS = {Samos, Greece}, | ||
| 359 : | PAGES = {9--17}, | ||
| 360 : | MONTH = {July}, | ||
| 361 : | YEAR = {2007} | ||
| 362 : | } | ||
| 363 : | |||
| 364 : | @INPROCEEDINGS{BrEbKr07, | ||
| 365 : | TITLE = {Compiler Generation from Structural Architecture Descriptions}, | ||
| 366 : | AUTHOR = {Florian Brandner and Dietmar Ebner and Andreas Krall}, | ||
| 367 : | BOOKTITLE = {International Conference on Compilers, Architecture, and Synthesis for Embedded Systems}, | ||
| 368 : | ADDRESS = {Salzburg, Austria}, | ||
| 369 : | PAGES = {13--22}, | ||
| 370 : | MONTH = {September}, | ||
| 371 : | YEAR = {2007} | ||
| 372 : | } | ||
| 373 : | |||
| 374 : | @INPROCEEDINGS{EbBrSchKrWiKa08, | ||
| 375 : | TITLE = {Generalized Instruction Selection using {SSA}-Graphs}, | ||
| 376 : | AUTHOR = {Dietmar Ebner and Florian Brandner and Bernhard Scholz and Andreas Krall and Peter Wiedermann and Albrecht Kadlec}, | ||
| 377 : | BOOKTITLE = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems}, | ||
| 378 : | EDITOR = {John Regehr}, | ||
| 379 : | PUBLISHER = {ACM}, | ||
| 380 : | PAGES = {31--40}, | ||
| 381 : | ADDRESS = {Tucson}, | ||
| 382 : | MONTH = {June}, | ||
| 383 : | YEAR = {2008}, | ||
| 384 : | } | ||
| 385 : | |||
| 386 : | @INPROCEEDINGS{BrFeKrRi09, | ||
| 387 : | TITLE = {Fast and Accurate Simulation using the LLVM Compiler Framework}, | ||
| 388 : | AUTHOR = {Florian Brandner and Andreas Fellnhofer and Andreas Krall and David Riegler}, | ||
| 389 : | BOOKTITLE = {Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO'09)}, | ||
| 390 : | EDITOR = {Smail Niar, Rainer Leupers, Olivier Temam}, | ||
| 391 : | PUBLISHER = {HiPEAC}, | ||
| 392 : | PAGES = {1--6}, | ||
| 393 : | ADDRESS = {Paphos, Cyprus}, | ||
| 394 : | MONTH = {January}, | ||
| 395 : | YEAR = {2009}, | ||
| 396 : | } | ||
| 397 : | andi | 1.4 | |
| 398 : | @INCOLLECTION{BrHoKr09, | ||
| 399 : | AUTHOR = {Florian Brandner and Nigel Horspool and Andreas Krall}, | ||
| 400 : | EDITOR = {Shuvra S. Bhattacharyya and Ed Deprettere and Rainer Leupers and Jarmo Takala}, | ||
| 401 : | BOOKTITLE = {Handbook on Signal Processing Systems}, | ||
| 402 : | TITLE = {DSP Instruction Set Simulation}, | ||
| 403 : | PUBLISHER = {Springer}, | ||
| 404 : | PAGES = {to appear}, | ||
| 405 : | MONTH = {December}, | ||
| 406 : | YEAR = {2009} | ||
| 407 : | } | ||
| 408 : |
|
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