| instruction set simulator with modelling of energy consumtion is Wattch |
instruction set simulator with modelling of energy consumtion is Wattch |
| \cite{BrooksTiwariMartonosi00}. |
\cite{BrooksTiwariMartonosi00}. |
| |
|
| Compiler Verification \cite{Hoare,1328444,1314860} |
Compiler Verification |
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|
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\cite{Hoare03} |
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\cite{TristanLeroy09} |
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\cite{TristanLeroy08} |
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\cite{Kundu+09} |
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\cite{Necula00} |
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\cite{ZaksPnueli08} |
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\cite{Pnueli98a} |
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\cite{Pnueli98b} |
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\cite{GlesnerGoosZimmeermann04} |
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\cite{GoosZimmermann00} |
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\cite{BlechPoetzsch07} |
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|
| WCET \cite{} |
WCET \cite{} |
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|
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|
| \paragraph*{WP2 - Verified Compilation} |
\paragraph*{WP2 - Verified Compilation} |
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|
| translation verification, specification of semantics of IRs solving |
Suitable semantics are necessary which support efficient translation |
| subproblems. |
validation or support easy verification of a compiler. We will research |
| |
into different semantics and into mappings between the semantics of our |
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processor description language \cite{BrEbKr07} and a compiler backend |
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semantics, intermediate representation semantics (compatible to LLVM) and |
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source language semantics. The main research will be on verification and |
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translation validation for all kinds of compiler optimizations. |
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|
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\begin{itemize} |
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\item Evaluate different semantics regarding suitability for compiler |
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verification and translation validation, eventually develop new |
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semantics |
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\item Develop a translator for an automatic mapping from our processor |
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description language into verification semantics |
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\item Develop a validation system from the intermediate representation |
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(LLVM) to the processor semantics |
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\item Develop a validation system from the source language (C) to the |
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intermediate representation (LLVM) |
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\item Research into verification and translation validation for different |
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frontend and backend optimizations |
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\end{itemize} |
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|
| \paragraph*{WP3 - Worst Case Ececution Time Analysis} |
\paragraph*{WP3 - Worst Case Ececution Time Analysis} |
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|