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| \title{\bf PP \emph{Compilation Techniques for Robust Embedded Systems}} |
\title{\bf PP \emph{Compilation Techniques for Robust Embedded Systems}} |
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|
| \author{{\sc Ulrich Schmid}\\ |
\author{{\sc Andreas Krall and Jens Knoop}\\ |
| s@ecs.tuwien.ac.at |
\{andi,knoop\}@complang.tuwien.ac.at |
| } |
} |
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| \bibliographystyle{unsrt} |
\bibliographystyle{unsrt} |
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| %special equipment) required for this work in a table. (20-30 lines)} |
%special equipment) required for this work in a table. (20-30 lines)} |
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| The project is divided into three work packages. |
Compilation techniques for robust embedded systems comprise different areas. |
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Therefore, the project is divided into three work packages: compilation and |
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simulation techniques for reliabiltiy, verified compilation and worst case |
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execution time analysis. |
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| \paragraph*{WP1 - Compilation and Simulation Techniques for Reliability} |
\paragraph*{WP1 - Compilation and Simulation Techniques for Reliability} |
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| (1) Specification and efficient simulation of reliable processors |
In previous work we have developed a processor description language |
| (partial redundancy, ECC, lockstep etc) and compiler optimizations to |
with a very concise semantics from where we automatically generate |
| exploit/balance reliabiliy features. Connection with CESAR NN1 |
optimized compilers \cite{BrEbKr07} and high efficient instruction set |
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simulators \cite{BrFeKrRi09}. This environment we use as testbed for |
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our compiler optimizations for embedded processors |
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\cite{EbBrSchKrWiKa08,PrKrHo06,MeKr07}. We will extend this |
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environment to do research on compilation and simulation techniques to |
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enhance the reliability of processor/memory systems by mixed |
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hardware/software and pure software techniques. |
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| \begin{itemize} |
\begin{itemize} |
| \item Specification method to specify an energy consumption model in |
\item Specification method to specify an energy consumption model in |
| \item Specification method for fault injection and fault checking in |
\item Specification method for fault injection and fault checking in |
| the processor specification |
the processor specification |
| \item Generation of optimized instruction set simulators from the |
\item Generation of optimized instruction set simulators from the |
| processor specification |
extended processor specification |
| \item Generation of optimizing compilers from the processor specification |
\item Generation of optimizing compilers from the extended processor |
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specification |
| \item Research into new compiler optimizations to increase reliability by |
\item Research into new compiler optimizations to increase reliability by |
| pure software solutions, mixed hardware/software solutions and |
pure software solutions, mixed hardware/software solutions and |
| balancing performance, code space, reliability and energy consumption |
balancing performance, code space, reliability and energy consumption |