| |
|
| */mod ( n1 n2 n3 -- n4 n5 ) core star_slash_mod |
*/mod ( n1 n2 n3 -- n4 n5 ) core star_slash_mod |
| ""n1*n2=n3*n5+n4, with the intermediate result (n1*n2) being double."" |
""n1*n2=n3*n5+n4, with the intermediate result (n1*n2) being double."" |
| DCell d5; |
|
| #ifdef BUGGY_LL_MUL |
#ifdef BUGGY_LL_MUL |
| DCell d = mmul(n1,n2); |
DCell d = mmul(n1,n2); |
| #else |
#else |
| n5=DLO(r); |
n5=DLO(r); |
| #else |
#else |
| /* assumes that the processor uses either floored or symmetric division */ |
/* assumes that the processor uses either floored or symmetric division */ |
| d5 = d/n3; |
DCell d5 = d/n3; |
| n4 = d%n3; |
n4 = d%n3; |
| if (CHECK_DIVISION && n3 == 0) |
if (CHECK_DIVISION && n3 == 0) |
| throw(BALL_DIVZERO); |
throw(BALL_DIVZERO); |
| |
|
| */ ( n1 n2 n3 -- n4 ) core star_slash |
*/ ( n1 n2 n3 -- n4 ) core star_slash |
| ""n4=(n1*n2)/n3, with the intermediate result being double."" |
""n4=(n1*n2)/n3, with the intermediate result being double."" |
| DCell d4; |
|
| #ifdef BUGGY_LL_MUL |
#ifdef BUGGY_LL_MUL |
| DCell d = mmul(n1,n2); |
DCell d = mmul(n1,n2); |
| #else |
#else |
| n4=DLO(r); |
n4=DLO(r); |
| #else |
#else |
| /* assumes that the processor uses either floored or symmetric division */ |
/* assumes that the processor uses either floored or symmetric division */ |
| d4 = d/n3; |
DCell d4 = d/n3; |
| if (CHECK_DIVISION && n3 == 0) |
if (CHECK_DIVISION && n3 == 0) |
| throw(BALL_DIVZERO); |
throw(BALL_DIVZERO); |
| if (FLOORED_DIV && ((DHI(d)^n3)<0) && (d%n3)!=0) |
if (FLOORED_DIV && ((DHI(d)^n3)<0) && (d%n3)!=0) |