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| 1 : | anton | 1.1 | /* |
| 2 : | Copyright 1992 by the ANSI figForth Development Group | ||
| 3 : | |||
| 4 : | This is the machine-specific part for the Power (incl. PPC) architecture | ||
| 5 : | */ | ||
| 6 : | |||
| 7 : | #if !defined(USE_TOS) && !defined(USE_NO_TOS) | ||
| 8 : | #define USE_TOS | ||
| 9 : | #endif | ||
| 10 : | |||
| 11 : | #ifndef INDIRECT_THREADED | ||
| 12 : | #ifndef DIRECT_THREADED | ||
| 13 : | /* #define DIRECT_THREADED */ | ||
| 14 : | #endif | ||
| 15 : | #endif | ||
| 16 : | |||
| 17 : | #include "32bit.h" | ||
| 18 : | |||
| 19 : | /* cache flush stuff */ | ||
| 20 : | #warning If you get assembly errors, here is the reason why | ||
| 21 : | anton | 1.2 | #define FLUSH_ICACHE(addr,size) asm("icbi (%0); isync"::"b"(addr)) |
| 22 : | anton | 1.1 | /* this assumes size=4 */ |
| 23 : | /* the mnemonics are for the PPC and the syntax is a wild guess; for | ||
| 24 : | Power the mnemonic for the isync instruction is "ics" and I have | ||
| 25 : | not found an equivalent for the icbi instruction in my reference. | ||
| 26 : | */ | ||
| 27 : | anton | 1.2 | |
| 28 : | #ifdef DIRECT_THREADED | ||
| 29 : | #warning Direct threading for Power has not been tested | ||
| 30 : | anton | 1.1 | |
| 31 : | /* PFA gives the parameter field address corresponding to a cfa */ | ||
| 32 : | #define PFA(cfa) (((Cell *)cfa)+2) | ||
| 33 : | /* PFA1 is a special version for use just after a NEXT1 */ | ||
| 34 : | /* the improvement here is that we may destroy cfa before using PFA1 */ | ||
| 35 : | #define PFA1(cfa) PFA(cfa) | ||
| 36 : | |||
| 37 : | /* I'll assume the code resides in the lower (or upper) 32M of the | ||
| 38 : | address space and use absolute addressing in the jumps to the | ||
| 39 : | handlers. This makes it possible to use the full address space for | ||
| 40 : | direct threaded Forth (even on 64-bit PowerPCs). However, the | ||
| 41 : | linker has to ensure that this really happens */ | ||
| 42 : | |||
| 43 : | #define JUMP_TARGET_BITS 0 | ||
| 44 : | /* assuming the code is in the lower 32M; if it is in the upper 32M, | ||
| 45 : | define JUMP_TARGET_BITS as ~0x3ffffff */ | ||
| 46 : | #define JUMP_MASK 0x3fffffc | ||
| 47 : | |||
| 48 : | /* CODE_ADDRESS is the address of the code jumped to through the code field */ | ||
| 49 : | #define CODE_ADDRESS(cfa) ((Label)(((*(unsigned *)(cfa))&JUMP_MASK)|JUMP_TARGET_BITS)) | ||
| 50 : | |||
| 51 : | /* MAKE_CF creates an appropriate code field at the cfa; ca is the | ||
| 52 : | code address. For those familiar with assembly, this is a `ba' | ||
| 53 : | instruction in both Power and PowerPC assembly languages */ | ||
| 54 : | #define MAKE_CF(cfa,ca) (*(long *)(cfa) = 0x48000002|(ca)) | ||
| 55 : | |||
| 56 : | /* this is the point where the does code for the word with the xt cfa | ||
| 57 : | starts. Since a branch is only a cell on Power, we can use the | ||
| 58 : | second cell of the cfa for storing the does address */ | ||
| 59 : | #define DOES_CODE(cfa) ((Xt *)(((long *)(cfa))[1])) | ||
| 60 : | /* this is a special version of DOES_CODE for use in dodoes */ | ||
| 61 : | #define DOES_CODE1(label) DOES_CODE(label) | ||
| 62 : | |||
| 63 : | /* the does handler resides between DOES> and the following Forth | ||
| 64 : | code. Since the code-field jumps directly to dodoes, the | ||
| 65 : | does-handler is not needed for the Power architecture */ | ||
| 66 : | #define DOES_HANDLER_SIZE 8 | ||
| 67 : | #define MAKE_DOES_HANDLER(addr) 0 | ||
| 68 : | |||
| 69 : | /* This makes a code field for a does-defined word. doesp is the | ||
| 70 : | address of the does-code. On the PPC, the code field consists of a | ||
| 71 : | jump to dodoes and the address of the does code */ | ||
| 72 : | #define MAKE_DOES_CF(cfa,doesp) ({Xt *_cfa = (Xt *)(cfa); \ | ||
| 73 : | MAKE_CF(_cfa, symbols[DODOES]); \ | ||
| 74 : | _cfa[1] = (doesp); }) | ||
| 75 : | #endif |
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