Minutes of a special GEnie Forth RoundTable Conference with Charles Johnsen, President of MISC, Inc. (Mutable Instruction Set Computer, formerly Minimum Instruction Set Computer. Charles is joined by Dr. David Fox, MISC's Software Engineer as the two discuss this new silicon engine. Entire contents of this transcript copyright (c) 1991 GEnie Forth RoundTable. The contents may be freely copied and distributed in whole or in part provided origination credit is included. Date: 04/18/91 Time: 22:32EDT Attendees: [[Jeff] J.STEWART40] [[Dennis] D.RUFFER] [[Len] NMORGENSTERN] [GARY-S] ................ SysOp and Conference moderator [[Charles] FIGGUEST]...... Charles Johnsen/David Fox, Conference guests [[wheels] S.WHEELER] [F.SCHIFF] [[FRANK] F.SERGEANT] [[jax4th] JAX] [[Wil] W.BADEN1] [RON.LANNING] [D.STRAUSS3] [P.ALLEN8] [T.EMRICH1] [[Cliff] C.MORAVETZ1] Minutes: <[Jeff] J.STEWART40> is here. <[Dennis] D.RUFFER> is here. <[Jeff] J.STEWART40> What can I do so I don't time out? You should be fine, Jeff <[Dennis] D.RUFFER> are you timing out? hum, musta come with the clock off Charles - type /nam Charles <[Jeff] J.STEWART40> I thought Idle time would log me off <[Dennis] D.RUFFER> has it logged you off yet Jeff? <[Jeff] J.STEWART40> I am new to this and not sure what will happen There was no meeting leader before, Dennis <[Dennis] D.RUFFER> ok, don't worry about it then... <[Dennis] D.RUFFER> the timer rarely catches any of us... 4 minutes to showtime ! is here. Steve - I presume you and our guest know one another - you are neighbors <[Charles] FIGGUEST> I know Wheeler. 3 minutes to conference <[wheels] S.WHEELER> We've met, but we don't see each other often ... I'm not exactly ... 2 minutes and counting <[wheels] S.WHEELER> active in local Fig.you know, the archive program for the MAC. yes, the billing clock has been turned off...it's confirmed :) Yes, Jeff - this will be a formal conference and it will be necessary to get permission to address the guest with a question or comment <[Jeff] J.STEWART40> OK....understand 1 minute to showtime <[Dennis] D.RUFFER> yep jeff, that is the best way BEGIN NOTES

The GEnie Forth RoundTable is please to welcome as tonight's ... special guest, Charles Johnsen, president of Minimum Instruction ... Set Computer,, Inc. He is designer of the M17 Stack Engine. ... His training is a degree in English Literature and a four year ... seminary training. He is an ordained Lutheran minister. ... Since leaving the parish ministry in 1979, he has been working ... in the electronics hardware industries. He was a product/process ... engineer for National Electronics for silicon controlled rectifiers, .. was a service manager for Lear Siegler, and operated his own ... computer repair business for several years. He began working on ... the Forth Engine four years ago. ( It is recommended you read ... the ACM SigForth paper, GEnie Forth RT file 2394, if you have ... not already done so. ) For tonight'S discussion, we are also ... joined by Dr. David Fox, MISC's software engineer who created ... the design systems and the C compiler for the M17. Please make welcome, Charles Johnsen and David Fox. ... .. .. .. .. .. .. ga Charles <[Charles] FIGGUEST> Thanks for the welcome. I wanted to speak about the Silicon Palimpsest this evening. <[Charles] FIGGUEST> That is the processor without a fixed... <[Charles] FIGGUEST> Instruction set. is here. Please give us a littl;e background on MISC <[Charles] FIGGUEST> MISC originally stood for Minimum Instruction Set Computer. <[Charles] FIGGUEST> It was a tiny company (and still is) set up to... <[Charles] FIGGUEST> create a Forth stack engine. <[Charles] FIGGUEST> We wanted to do something different from Novix. <[Charles] FIGGUEST> We wanted a processor for embedded control, not desk top <[Charles] FIGGUEST> computing. That guided our efforts and our business. <[Charles] FIGGUEST> Today we have changed our name to Mutable Instruction <[Charles] FIGGUEST> Set Computer, Inc., because we have an even better idea. <[Charles] FIGGUEST> By using FPGA (field programmable gate arrays)... <[Charles] FIGGUEST> We believe we can create a processor... <[Charles] FIGGUEST> with a mutable instruction set. <[Charles] FIGGUEST> is here. While we pause for a question give folks your address and phone number <[Charles] FIGGUEST> 19704 East Loyola Circle <[Charles] FIGGUEST> Aurora, CO 80013-3904 <[Charles] FIGGUEST> 303 680 9749 <[Charles] FIGGUEST> The advantage of a mutable instruction set is that... <[Charles] FIGGUEST> Custom instructions can be designed for improved performance. <[Charles] FIGGUEST> For example... <[Charles] FIGGUEST> If a shift bit is buried in a sixteen bit... <[Charles] FIGGUEST> word as it arrives at the pins... <[Charles] FIGGUEST> A conventional processor would have to shift and mask... <[Charles] FIGGUEST> maybe many times to "get" that flag and use it as... <[Charles] FIGGUEST> a conditional. With the mutable instruction available... <[Charles] FIGGUEST> That lone bit can be tied inside the processor... <[Charles] FIGGUEST> to the operation required thru the instruction... <[Charles] FIGGUEST> decoder and the conditional decoder (data decoder). <[wheels] S.WHEELER> How much effort is required to build such a custom instruction, ... <[wheels] S.WHEELER> and what happens if you don't have something defined ... <[wheels] S.WHEELER> when you first execute the (or one of the?) mutable instructions? <[Charles] FIGGUEST> Of Course these instructions are not easy to create. <[Charles] FIGGUEST> They need design skills like any hardware design task.But since the processor comes with a full instruction set.. <[Charles] FIGGUEST> only a few instructions need this kind of effort. is here. <[jax4th] JAX> Charles, last conference ... <[jax4th] JAX> Glen Haydon was asked how he was planning to market the marvelous WISC ... <[jax4th] JAX> and he responded ... <[jax4th] JAX> " Don't know, any ideas?" ... <[jax4th] JAX> in the tradition of the Novix, SHBOOM and RTX :-) .... :-( <[jax4th] JAX> So Charles, I'll ask you ... <[jax4th] JAX> Since processors are made of money, not silicon ... <[jax4th] JAX> how are you going to market this? <[Charles] FIGGUEST> First, we are not selling silicon. Plessey is... <[Charles] FIGGUEST> We are selling something like software, a processor... <[Charles] FIGGUEST> on a disk. Down loading our file named "M17" into... <[Charles] FIGGUEST> the chip you bought from Plessey gives you a processor... <[Charles] FIGGUEST> with a mutable instruction set. Then you will want, <[Charles] FIGGUEST> naturally, our design tools to allow you to mutate your... <[Charles] FIGGUEST> silicon. Plessey is happy to support our efforts... <[Charles] FIGGUEST> because we are not competing wiht them. <[Charles] FIGGUEST> Second, we are presently ready to market a design system... <[Charles] FIGGUEST> aimed at the Plessey FPGA. This is an item which will... <[Charles] FIGGUEST> be in the 1K$ range. Ten customers a month would be... <[Charles] FIGGUEST> just fine. You have heard me speak. I am no George Bush, <[Charles] FIGGUEST> but I think we can push 10 a month. is here. jax has a follow-up - <[jax4th] JAX> Charles ... <[jax4th] JAX> I am (for sake of argument) hard-headed project mgr ... <[jax4th] JAX> I am ready to do my project in a 999 gigahertz 8051 second source ... <[jax4th] JAX> just like I have done every control project for the last umpteen years ... <[jax4th] JAX> And you come in my office with a scheme to turn a logic device in to a magic uProc ... <[jax4th] JAX> What am I to think you are selling me? ... and ... <[jax4th] JAX> WHy don't I just boot you out of my office? :-) <[Charles] FIGGUEST> Jack, that question is like, "I hate you. Make me like you."... <[jax4th] JAX> Right, that's what sales is about. <[jax4th] JAX> More like, "What is he selling?" <[Charles] FIGGUEST> I can't go into how I would handle a dope like that. We <[Charles] FIGGUEST> We don't we EVERY enginer there ever was. <[Charles] FIGGUEST> Second, we are selling--at present--a design system for... <[jax4th] JAX> Who do you get? What engineer do you get? jax - please let him finish <[Charles] FIGGUEST> his "logic device." <[Charles] FIGGUEST> I cannot answer your question in that partic way. <[Charles] FIGGUEST> We have a customer in mind. Our marketing approach is too. <[Charles] FIGGUEST> call on that customer. If we run out of them... <[Charles] FIGGUEST> then I will call JAX to see it has some more for me. <[Charles] FIGGUEST> For now, we have enough interest, more than enough, to <[Charles] FIGGUEST> keep us busy for some time. is here. <[Charles] FIGGUEST> Also, I know that later we will need a "marketing" effort.. <[Charles] FIGGUEST> Everybody does... <[Charles] FIGGUEST> A lot of companies fail when the brilliant enginer forgets <[Charles] FIGGUEST> he is not a salesman... <[Charles] FIGGUEST> Last I heard, a salesman can be hired. <[Charles] FIGGUEST> I would rather talk about the technical than the business.. <[jax4th] JAX> don't get me wrong, *I* want you chip ... but I am not typical! I just was wondering *who* the typical customer is for such an exotic device. <[Len] NMORGENSTERN> I am sure you have run speed comparison tests between the <[Len] NMORGENSTERN> MISC and other processors. Can you tell us some details? <[Charles] FIGGUEST> First, Plessey's large array, which we require for our... <[Charles] FIGGUEST> mutable instruction set processor... <[Charles] FIGGUEST> won't be out until August this year. <[Charles] FIGGUEST> Second, we expect that for a standard instruction... <[Charles] FIGGUEST> like add or shift, we will be 1/10 of a standard... <[Charles] FIGGUEST> processor. Maybe better, maybe only 1/2. But in... <[Charles] FIGGUEST> the specific instruction constructed by the enginer/user... <[Charles] FIGGUEST> we will be MUCH faster than a FISC (fixed instruction set computer). Comment from SysOp, Plessey is renowned in Europe for fast array processors, many Charge Coupled and Nmos engines, so the chip should have speed. <[wheels] S.WHEELER> Given that you have a C compiler planned (and, I assume) .. <[wheels] S.WHEELER> Forth in the processor itself, what other S/W development . <[wheels] S.WHEELER> tools do plan to have available for users? Assembler, ... <[wheels] S.WHEELER> mutable instruction compiler, etc? Please intro David and provide some details on Steve's question <[Charles] FIGGUEST> I'm David Fox, MISC's software engineer... <[Charles] FIGGUEST> The problem of compilers for mutable instruction set <[Charles] FIGGUEST> processors is a difficult one which we are working on. <[Charles] FIGGUEST> FORTH and assemblers are easy. <[Charles] FIGGUEST> The C compiler for the M17 will serve as a base... <[Charles] FIGGUEST> Initially the mutable instructions will be handled by... <[Charles] FIGGUEST> library functions and inline code. - will it be necessary... to load in the instruction set before each use... will there be ROM packages ? <[Charles] FIGGUEST> First, the Plessey array is voltile. <[Charles] FIGGUEST> Second, ROM or disk, we can load the whole chip. <[Charles] FIGGUEST> Third, the Plessey array has an autoloader in hardware... <[Charles] FIGGUEST> that generates the handshaking and addresses... <[Charles] FIGGUEST> necessary for loading from ROM--serial or 8 bit parallel. <[Charles] FIGGUEST> WE HOPE that s few other vendors provide FPGA like... <[Charles] FIGGUEST> Plesseys so we can expand... <[Charles] FIGGUEST> But for now, what they can do we can do--but no more. <[wheels] S.WHEELER> So do you load different instructions sets for Forth ... <[wheels] S.WHEELER> and C, or have you only designed one set? ... <[wheels] S.WHEELER> And would the autoloader hardware allow you to reload ... <[wheels] S.WHEELER> on the fly if another processor makes more sense ... <[wheels] S.WHEELER> for changing conditions in the target application? is here. <[Charles] FIGGUEST> We, for now, propose that there must be a kernal... <[Charles] FIGGUEST> which is basically a Forth stack engine. ... <[Charles] FIGGUEST> Each new instruction can be loaded on the fly... <[Charles] FIGGUEST> without distrubing the rest of the chip. <[Charles] FIGGUEST> In other words, you could execute a normal Forth <[Charles] FIGGUEST> instruction while the hardware was loading a specialized <[Charles] FIGGUEST> instruction in the area set aside on the silicon for <[Charles] FIGGUEST> instructions that changed. <[Charles] FIGGUEST> But there is also the opportunity to change the whole... <[Charles] FIGGUEST> configuration of the whole chip... <[Len] NMORGENSTERN> I looked at your upload. I have the impression that there <[Len] NMORGENSTERN> might be analogies between MISC and parallel processors. <[Len] NMORGENSTERN> Is that true? <[Charles] FIGGUEST> Yes, but we are not big enough to develop that end of things... <[Charles] FIGGUEST> We would be delighted to grow in that way and we... <[Charles] FIGGUEST> both believe that the Plessey array and the Silicon... <[Charles] FIGGUEST> Palimpsest can ultimately do "parallel" processing... <[Charles] FIGGUEST> Even now, in a few pins, we can handle some primative stuff. Frank - you have the honor of tonite's last question from the floor <[FRANK] F.SERGEANT> I have 2 questions: 1st, what does/will a single Plessey FPGA cost ... <[FRANK] F.SERGEANT> and 2nd, how does MISC on it compare in speed to the RTX2000? <[Charles] FIGGUEST> The Plessey parts cost about $30 in the 84 pin plcc... <[Charles] FIGGUEST> The RTX would be faster for ordinary instructions... <[Charles] FIGGUEST> just the regular run of code... <[Charles] FIGGUEST> But if there were was an operation that took ten... <[Charles] FIGGUEST> RTX instructions that we could do in one in hardware... <[Charles] FIGGUEST> then we may well be ten times faster in that one... <[Charles] FIGGUEST> instruction. If that instruction--as happens on embedded <[Charles] FIGGUEST> systems--takes up any significant percnetage of time, we <[Charles] FIGGUEST> will run rings around the RTX... <[Charles] FIGGUEST> Dave says I exagerate... <[Charles] FIGGUEST> See, I can sell!. Charles, please give us your closing comments <[Charles] FIGGUEST> You are looking in on the first few months of... <[Charles] FIGGUEST> a new direction in the hardware/software division... <[Charles] FIGGUEST> Now we can play again. Now the enginer can invent his... <[Charles] FIGGUEST> own processor/instruction/system/archetechure again... <[Charles] FIGGUEST> WE are new. I have no idea what you will do... <[Charles] FIGGUEST> But I am going to have a lot of fun in the next few... <[Charles] FIGGUEST> years. I hope to have a lot of cash too. I have... <[Charles] FIGGUEST> a lot of confidence that you can help and share in... <[Charles] FIGGUEST> our new enterprise... <[Charles] FIGGUEST> This is so short... <[Charles] FIGGUEST> I hope you can all read the paper... <[Charles] FIGGUEST> Feel free to call and chat... <[Charles] FIGGUEST> 303 680 9749. <[Charles] FIGGUEST> Thank you. Charles Johnsen and David Fox, thank you for an interesting eveing and a preview of an intriguing engine. Please make a point of keeping us posted here on the GEnie Forth RoundTable. This conference is officially over. All may stay and chat, but the transcript is closed. === End of Steno notes. ===