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PBQP Instruction Selection für TI C64x+

Das LLVM Backend für TI C64x+ verwendet nur einen kleinen Teil der verfügbaren Instruktionen. Basierend auf einer Auswahl an Benchmarks (DSPStone, MiBench subset) sollen weitere Instruktionen hinzugefügt werden um die Effizienz des generierten Codes zu erhöhen.

Beispiele für Instruktionen:

TI C64x+: Integrated scheduling and cluster assignment

Over time, many algorithms have been proposed to solve scheduling on clustered VLIW processors. Some suffer from so-called phase-ordering issues, where the decisions taken during cluster assignment hamper scheduling or vice versa. Others are too complex and time-consuming to be applicable for use in a production compiler.

During this project, an existing integrated cluster assignment algorithm should be integrated with our LLVM compiler backend for the TI C64x+, and the performance compared to the phase-ordered approach currently in place.

Further reading:
Unified Assign and Schedule: at ieee.org
Cluster assignment based graph partitioning (includes survey of many existing algorithms): at acm.org

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Faculty of Informatics
Vienna University of Technology
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