Diff for /gforth/prim between versions 1.145 and 1.147

version 1.145, 2003/10/09 14:15:19 version 1.147, 2003/11/02 22:15:28
Line 138 Line 138
 \ Stack caching setup  \ Stack caching setup
 \E register IPTOS Cell  ifdef(`M4_ENGINE_FAST', `include(cache1.vmg)', `include(cache0.vmg)')
 \E register spTOS Cell  
 \E register sp1 Cell  
 \E register sp2 Cell  
 \E register sp3 Cell  
 \E create IPregs IPTOS ,  
 \E create regs sp2 , sp1 , spTOS ,  
 \E IPregs 1 0 stack-state IPss1  
 \E regs 3 cells + 0 0 stack-state ss0  
 \E regs 2 cells + 1  0 stack-state ss1  
 \E regs 1 cells + 2  1 stack-state ss2  
 \E regs 0 cells + 3  2 stack-state ss3  
 \ the first of these is the default state  
 \E state S0  
 \E state S1  
 \E state S2  
 \E state S3  
 \E ss0 data-stack S0 set-ss  
 \E ss1 data-stack S1 set-ss  
 \E ss2 data-stack S2 set-ss  
 \E ss3 data-stack S3 set-ss  
 \E IPss1 inst-stream S0 set-ss  
 \E IPss1 inst-stream S1 set-ss  
 \E IPss1 inst-stream S2 set-ss  
 \E IPss1 inst-stream S3 set-ss  
 \E data-stack to cache-stack  
 \E here 4 cache-states 2! s0 , s1 , s2 , s3 ,  
 \ !! the following should be automatic  
 \E S0 to state-default  
 \E state-default to state-in  
 \E state-default to state-out  
 \ these m4 macros would collide with identifiers  \ these m4 macros would collide with identifiers
 undefine(`index')  undefine(`index')
Line 2566  a_addr = groups; Line 2529  a_addr = groups;
 \g static_super  \g static_super
 \C #if !defined(GFORTH_DEBUGGING) && !defined(INDIRECT_THREADED) && !defined(DOUBLY_INDIRECT) && !defined(VM_PROFILING)  ifdef(`M4_ENGINE_FAST',
 \C #endif  
 \g end  \g end

Removed from v.1.145  
changed lines
  Added in v.1.147

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